回覆: [PATCH 0/3] phy: aspeed: Add ASPEED PCIe PHY support

Jacky Chou jacky_chou at aspeedtech.com
Mon Oct 12 22:32:47 PDT 2026


Hi Krzysztof,

Thank you for your reply.

> > The driver registers an ASPEED PCIe PHY provider through the generic
> > PHY framework and programs the SoC-specific PEHR registers from
> set_mode().
> > For AST2600 this selects the root complex port type. For AST2700 this
> > also configures the posted/completion credit values, local scaling,
> > device type, internal reset selection, and downstream port setting
> > needed by the controller.
> >
> > This series also adds the devicetree binding for the PHY provider and
> > a MAINTAINERS entry for the ASPEED PCIe PHY driver.
> >
> > Signed-off-by: Jacky Chou <jacky_chou at aspeedtech.com>
> > ---
> > Jacky Chou (3):
> >       dt-bindings: phy: aspeed: Add ASPEED PCIe PHY
> >       phy: aspeed: Add ASPEED PCIe PHY driver
> >       MAINTAINERS: Add ASPEED PCIe PHY driver
> 
> And changelog plus versioning are completely missing.
> 
> People sometimes wonder why maintainers are grumpy. Easy answer: you do
> not respect their time.
> 

I'm sorry for omitting the version number and changelog from this submission and 
for wasting your time.
I appreciate the time and effort you and the other reviewers put into reviewing 
patches and maintaining the kernel.
I'll stop using this thread and resend the series as v10, based on the previous v9, 
with proper versioning and a changelog describing the changes since v9.v

Thanks,
Jacky



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