[PATCH 4/5] arm64: dts: apple: t8140: Add pinctrl nodes
Yureka Lilian
yureka at cyberchaos.dev
Mon Oct 12 04:52:35 PDT 2026
Add the pin controller nodes present on the Apple Silicon T8140 (A18
Pro) SoC. The pinctrl controllers uses the new apple,t8140-pinctrl
compatible to reflect the requirement for not reading or writing the
registers related to the pins listed in gpio-reserved-ranges.
The pinctrl_ap is a prerequisite for enabling the I2C and PCIe
controllers.
Signed-off-by: Yureka Lilian <yureka at cyberchaos.dev>
---
arch/arm64/boot/dts/apple/t8140.dtsi | 114 +++++++++++++++++++++++++++++++++++
1 file changed, 114 insertions(+)
diff --git a/arch/arm64/boot/dts/apple/t8140.dtsi b/arch/arm64/boot/dts/apple/t8140.dtsi
index 40559da62923..339a6b4f283d 100644
--- a/arch/arm64/boot/dts/apple/t8140.dtsi
+++ b/arch/arm64/boot/dts/apple/t8140.dtsi
@@ -7,6 +7,7 @@
#include <dt-bindings/interrupt-controller/apple-aic.h>
#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/pinctrl/apple.h>
/ {
compatible = "apple,t8140", "apple,arm-platform";
@@ -168,6 +169,29 @@ aic: interrupt-controller at 301000000 {
power-domains = <&ps_aic>;
};
+ pinctrl_nub: pinctrl at 3081f0000 {
+ compatible = "apple,t8140-pinctrl";
+ reg = <0x3 0x081f0000 0x0 0x4000>;
+ power-domains = <&ps_nub_gpio>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-ranges = <&pinctrl_nub 0 0 30>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ interrupt-parent = <&aic>;
+ interrupts = <AIC_IRQ 473 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 474 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 475 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 476 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 477 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 478 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 479 IRQ_TYPE_LEVEL_HIGH>;
+
+ apple,npins = <30>;
+ };
+
pmgr_mini: power-management at 308280000 {
compatible = "apple,t8140-pmgr", "apple,t8103-pmgr",
"syscon", "simple-mfd";
@@ -185,6 +209,96 @@ wdt: watchdog at 3082b0000 {
interrupts = <AIC_IRQ 507 IRQ_TYPE_LEVEL_HIGH>;
};
+ pinctrl_smc: pinctrl at 30c820000 {
+ compatible = "apple,t8140-pinctrl";
+ reg = <0x3 0x0c820000 0x0 0x4000>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-ranges = <&pinctrl_smc 0 0 6>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ interrupt-parent = <&aic>;
+ interrupts = <AIC_IRQ 572 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 573 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 574 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 575 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 576 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 577 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 578 IRQ_TYPE_LEVEL_HIGH>;
+
+ apple,npins = <6>;
+ };
+
+ pinctrl_aop: pinctrl at 310824000 {
+ compatible = "apple,t8140-pinctrl";
+ reg = <0x3 0x10824000 0x0 0x4000>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-ranges = <&pinctrl_aop 0 0 57>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ interrupt-parent = <&aic>;
+ interrupts = <AIC_IRQ 380 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 381 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 382 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 383 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 384 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 385 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 386 IRQ_TYPE_LEVEL_HIGH>;
+
+ apple,npins = <57>;
+ };
+
+ pinctrl_mtp: pinctrl at 314838000 {
+ compatible = "apple,t8140-pinctrl";
+ reg = <0x3 0x14838000 0x0 0x4000>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-ranges = <&pinctrl_mtp 0 0 10>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ interrupt-parent = <&aic>;
+ interrupts = <AIC_IRQ 1128 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 1129 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 1130 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 1131 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 1132 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 1133 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 1134 IRQ_TYPE_LEVEL_HIGH>;
+
+ apple,npins = <10>;
+ };
+
+ pinctrl_ap: pinctrl at 31a000000 {
+ compatible = "apple,t8140-pinctrl";
+ reg = <0x3 0x1a000000 0x0 0x100000>;
+ power-domains = <&ps_gpio>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-ranges = <&pinctrl_ap 0 0 216>;
+ gpio-reserved-ranges = <134 1>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ interrupt-parent = <&aic>;
+ interrupts = <AIC_IRQ 263 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 264 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 265 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 266 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 267 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 268 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 269 IRQ_TYPE_LEVEL_HIGH>;
+
+ apple,npins = <216>;
+ };
+
serial0: serial at 385200000 {
compatible = "apple,s5l-uart";
reg = <0x3 0x85200000 0x0 0x1000>;
--
2.55.0
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