[PATCH 1/2] dt-bindings: nvmem: SID: Add binding for R40 SID controller

[Krzysztof Kozlowski]

On Fri, Oct 02, 2026 at 10:25:35PM -0300, Otavio Salvador wrote:
> The Allwinner R40 SID exposes its 2Kbit eFuse at offset 0x200 of the
> controller, readable directly from MMIO like on the A64. Add the R40
> compatible with the A64 one as fallback, as done for the A100, H616 and
> A523.
> 
> On an A40i, all 64 eFuse words read through the MMIO window match the
> words read through the SID_PRCTL/SID_RDKEY registers, so the R40 does
> not need the register-based readout of the H3.
> 
> Signed-off-by: Otavio Salvador <otavio at ossystems.com.br>
> ---
>  .../devicetree/bindings/nvmem/allwinner,sun4i-a10-sid.yaml       | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/Documentation/devicetree/bindings/nvmem/allwinner,sun4i-a10-sid.yaml b/Documentation/devicetree/bindings/nvmem/allwinner,sun4i-a10-sid.yaml
> index f67470b8a2ed2..a4960b0ef8cbe 100644
> --- a/Documentation/devicetree/bindings/nvmem/allwinner,sun4i-a10-sid.yaml
> +++ b/Documentation/devicetree/bindings/nvmem/allwinner,sun4i-a10-sid.yaml
> @@ -25,6 +25,7 @@ properties:
>        - const: allwinner,sun50i-a64-sid
>        - items:
>            - enum:
> +              - allwinner,sun8i-r40-sid

Assumming this enum is kept in natural sort order:

>                - allwinner,sun50i-a100-sid


Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski at oss.qualcomm.com>

Best regards,
Krzysztof