[PATCH v2 0/7] KVM: arm64: vgic-v3: Make LPI disabling robust (and more)
Fuad Tabba
fuad.tabba at linux.dev
Thu Oct 8 11:15:46 PDT 2026
Hi Marc,
On Tue, 29 Sep 2026 10:35:41 +0100, Marc Zyngier <maz at kernel.org> wrote:
[...]
> Address the two issues in one go, by actively taking a refcount on all
> IRQs referenced by last_lr_irq, and making sure that disabling LPIs
> force all vcpus to be paused, making it safe.
I'm triaging Sashiko's pre-existing bug database, and I ran into
something that I think this series doesn't cover.
vgic_its_inject_cached_translation() doesn't check vgic_lpis_enabled()
(the slow path, vgic_its_resolve_lpi(), does), and pausing the vCPUs
doesn't stop an MSI coming in through irqfd or KVM_SIGNAL_MSI. So an
MSI that hits the translation cache between vgic_flush_pending_lpis()
and vgic_its_invalidate_all_caches() can still end up on the ap_list
of a vCPU whose LPIs are being disabled, after the flush.
Could the cached path check vgic_lpis_enabled() on the target vCPU, or
am I missing something?
Cheers,
/fuad
More information about the linux-arm-kernel
mailing list