[PATCH] clk: sp7021: fix infrastructure clocks clobbering PLL provider entries

[Andrew Gaylard]

Brian Masney <bmasney at redhat.com> writes:

> Hi Andrew,
>
> On 2026-08-20 15:02 +0200, Andrew Gaylard wrote:
>> The sp_clk_gates[] array previously included 9 infrastructure gate
>> clocks (CLK_SYSTEM, CLK_IOCTL, etc.) appended after the 64 DT-visible
>> gate clocks. The registration loop used the array index directly as the
>> hws[] index, so infrastructure clocks at positions 64-72 overwrote
>> hws[PLL_A] through hws[PLL_SYS].
[...]
>
> This patch does not apply against the tree.
>
> Brian

Hi Brian,

Thanks for looking at this path. I have a better fix now, but it needs
another series [0] to land first.

[0] https://lore.kernel.org/linux-arm-kernel/20260924164922.117236-1-ag@ffroot.co.za/

-- 
Andrew