[PATCH] arm64: dts: st: add PSCI idle state to STM32MP25 CPU domains

[Patrick Delaunay]

Define a PSCI CPU suspend state and reference it from both STM32MP25
CPU power domains.

In OSI mode, PSCI power domains are initialized as off. The idle-state
allows the CPU power-domain governor to manage them, avoiding probe
stalls for devices that depend on the cluster power domain, including
SDMMC1.

Signed-off-by: Patrick Delaunay <patrick.delaunay at foss.st.com>
---
Hi,

On kernel v7.4-rc1 and with TF-A BL31 compiled with the PSCI OSI support
the boot of STM32MP25 boards failed because
1/ the domain are OFF by default since commit 6d3080bfe007 ("cpuidle:
   psci: Initialize the PM domains in powered off state for OSI")
2/ the SDMMC1 uses the PSCI domain cluster since commit 4f454e51290d0
   ("arm64: dts: st: add power-domains to sdmmc1 on stm32mp251").

In the trace we have:

[    0.000000] psci: probing for conduit method from DT.
[    0.000000] psci: PSCIv1.1 detected in firmware.
[    0.000000] psci: Using standard PSCI v0.2 function IDs
[    0.000000] psci: Trusted OS migration not required
[    0.000000] psci: SMC Calling Convention v1.5
[    0.000000] psci: OSI mode supported.
[    0.000000] Zone ranges:
.....
[    0.242188] CPUidle PSCI: Initialized CPU PM domain topology using OSI mode
.....
[    1.604962] PM: genpd: Disabling unused power domains
...
[   11.833535] platform 40130000.i2c: deferred probe pending: (reason unknown)
[   11.834888] amba 48220000.mmc: deferred probe pending: (reason unknown)
[   11.841607] genpd_provider power-domain-cluster: sync_state() pending due to 40500000.ommanager

When I remove the power-domain in SDMMC node, I can check the
genpd state and all the PSCI are OFF:

# cat /sys/kernel/debug/pm_genpd/pm_genpd_summary
domain                          status          children        performance
   /device                         runtime status                  managed by
------------------------------------------------------------------------------
power-domain-cpu1               off-0                           0
power-domain-retention          off-0                           0
                                               power-domain-cluster
power-domain-cluster            off-0                           0
                                               power-domain-cpu0, power-domain-cpu1
power-domain-cpu0               off-0                           0


I can confirm that without the PSCI power domain commit 6d3080bfe007
("cpuidle: psci: Initialize the PM domains in powered off state for
OSI"), I come back to previous behavior:

cat /sys/kernel/debug/pm_genpd/pm_genpd_summary
domain                          status          children        performance
    /device                         runtime status                  managed by
------------------------------------------------------------------------------
power-domain-cpu1               off-0                           0
power-domain-retention          on                              0
                                                power-domain-cluster
power-domain-cluster            on                              0
                                                power-domain-cpu0, power-domain-cpu1
    40130000.i2c                    suspended                   0           SW
    48030000.dcmipp                 suspended                   0           SW
power-domain-cpu0               off-0

The proposed patch is the simplest solution to allow boot of STM32MP25
with kernel v7.4-rc1 and before upstream of D1 power-domain and full
PSCI OSI support.

Regards

Patrick

 arch/arm64/boot/dts/st/stm32mp251.dtsi | 14 ++++++++++++++
 arch/arm64/boot/dts/st/stm32mp253.dtsi |  1 +
 2 files changed, 15 insertions(+)

diff --git a/arch/arm64/boot/dts/st/stm32mp251.dtsi b/arch/arm64/boot/dts/st/stm32mp251.dtsi
index dac3d2d23ff0..bf1542818be2 100644
--- a/arch/arm64/boot/dts/st/stm32mp251.dtsi
+++ b/arch/arm64/boot/dts/st/stm32mp251.dtsi
@@ -25,6 +25,19 @@ cpu0: cpu at 0 {
 			power-domains = <&CPU_PD0>;
 			power-domain-names = "psci";
 		};
+
+		idle-states {
+			entry-method = "psci";
+
+			cpu_sleep: cpu-sleep {
+				compatible = "arm,idle-state";
+				arm,psci-suspend-param = <0x00000002>;
+				local-timer-stop;
+				entry-latency-us = <150>;
+				exit-latency-us = <200>;
+				min-residency-us = <1000>;
+			};
+		};
 	};
 
 	arm-pmu {
@@ -145,6 +158,7 @@ psci {
 
 		CPU_PD0: power-domain-cpu0 {
 			#power-domain-cells = <0>;
+			domain-idle-states = <&cpu_sleep>;
 			power-domains = <&CLUSTER_PD>;
 		};
 
diff --git a/arch/arm64/boot/dts/st/stm32mp253.dtsi b/arch/arm64/boot/dts/st/stm32mp253.dtsi
index 7e82f01fdc10..19b3e55a4414 100644
--- a/arch/arm64/boot/dts/st/stm32mp253.dtsi
+++ b/arch/arm64/boot/dts/st/stm32mp253.dtsi
@@ -26,6 +26,7 @@ arm-pmu {
 	psci {
 		CPU_PD1: power-domain-cpu1 {
 			#power-domain-cells = <0>;
+			domain-idle-states = <&cpu_sleep>;
 			power-domains = <&CLUSTER_PD>;
 		};
 	};
---
base-commit: 6628e7d4c6b25c8d18f1345e3a20d21829aae7e4
branch: master

-- 
2.43.0