[PATCH v9 06/16] drm/imx: dc: Flag CRTC status in GENERALPURPOSE register
Liu Ying
victor.liu at nxp.com
Mon Nov 2 22:22:02 PST 2026
Map Display Controller's register GENERALPURPOSE at offset 0x100 and
create an MMIO regmap to access the register. Create helpers
dc_drv_flag_crtc_{enable,disable}() with the 2 LSB bits in the register
to flag the CRTC enablement/disablement status. Also, create a helper
dc_drv_crtc_is_enabled() so that the CRTC driver can use it to check
if the CRTC is enabled by a previous boot or not. This is a preparation
for an upcoming patch to disable display controller at boot if the CRTC
was enabled by the driver during a previous boot instead of a bootloader.
Reviewed-by: Laurentiu Palcu <laurentiu.palcu at oss.nxp.com>
Signed-off-by: Liu Ying <victor.liu at nxp.com>
---
v9:
- Fix typos in patch subject and commit message. (Sashiko AI bot)
- Set .max_register_is_0 = true in dc_gp_regmap_config. (Sashiko AI bot)
v8:
- Rename dc_drv_crtc_was_enabled() to dc_drv_crtc_is_enabled(). (Laurentiu)
- Use dev_err_probe() to handle errors returned from several function calls.
(Laurentiu)
- Collect Laurentiu's R-b tag.
v7:
- Newly introduced in v7 as a preparation for fixing Sashiko AI bot's
comment on an upcoming patch. (Sashiko AI bot)
---
drivers/gpu/drm/imx/dc/dc-drv.c | 76 +++++++++++++++++++++++++++++++++++++++++
drivers/gpu/drm/imx/dc/dc-drv.h | 7 ++++
2 files changed, 83 insertions(+)
diff --git a/drivers/gpu/drm/imx/dc/dc-drv.c b/drivers/gpu/drm/imx/dc/dc-drv.c
index 13795a2ad735..4c0749e5aa09 100644
--- a/drivers/gpu/drm/imx/dc/dc-drv.c
+++ b/drivers/gpu/drm/imx/dc/dc-drv.c
@@ -13,6 +13,7 @@
#include <linux/platform_device.h>
#include <linux/pm.h>
#include <linux/pm_runtime.h>
+#include <linux/regmap.h>
#include <drm/clients/drm_client_setup.h>
#include <drm/drm_atomic_helper.h>
@@ -28,9 +29,22 @@
#include "dc-drv.h"
#include "dc-pe.h"
+/* General Purpose register offset used to flag driver usage. */
+#define GENERALPURPOSE 0x100
+#define CRTC_ENABLED(x) BIT(x)
+
struct dc_priv {
struct drm_device *drm;
struct clk *clk_cfg;
+ struct regmap *gp_regmap;
+};
+
+static const struct regmap_config dc_gp_regmap_config = {
+ .reg_bits = 32,
+ .reg_stride = 4,
+ .val_bits = 32,
+ .max_register = 0,
+ .max_register_is_0 = true,
};
DEFINE_DRM_GEM_DMA_FOPS(dc_drm_driver_fops);
@@ -156,6 +170,8 @@ static int dc_probe(struct platform_device *pdev)
{
struct component_match *match = NULL;
struct dc_priv *priv;
+ struct resource *r;
+ void __iomem *base;
int ret;
priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
@@ -167,6 +183,27 @@ static int dc_probe(struct platform_device *pdev)
return dev_err_probe(&pdev->dev, PTR_ERR(priv->clk_cfg),
"failed to get cfg clock\n");
+ r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!r)
+ return dev_err_probe(&pdev->dev, -EINVAL,
+ "failed to get MEM IO resource\n");
+
+ if (!devm_request_mem_region(&pdev->dev, r->start + GENERALPURPOSE, 4,
+ dev_name(&pdev->dev)))
+ return dev_err_probe(&pdev->dev, -EBUSY,
+ "failed to request memory region\n");
+
+ base = devm_ioremap(&pdev->dev, r->start + GENERALPURPOSE, 4);
+ if (!base)
+ return dev_err_probe(&pdev->dev, -ENOMEM,
+ "failed to do ioremap\n");
+
+ priv->gp_regmap = devm_regmap_init_mmio(&pdev->dev, base,
+ &dc_gp_regmap_config);
+ if (IS_ERR(priv->gp_regmap))
+ return dev_err_probe(&pdev->dev, PTR_ERR(priv->gp_regmap),
+ "failed to init General Purpose regmap\n");
+
dev_set_drvdata(&pdev->dev, priv);
ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
@@ -196,6 +233,45 @@ static void dc_remove(struct platform_device *pdev)
component_master_del(&pdev->dev, &dc_drm_ops);
}
+void dc_drv_set_crtc_enable(struct dc_drm_device *dc_drm,
+ unsigned int crtc_index)
+{
+ struct dc_priv *priv = dev_get_drvdata(dc_drm->base.dev);
+
+ if (WARN_ON(crtc_index > 1))
+ return;
+
+ regmap_set_bits(priv->gp_regmap, 0, CRTC_ENABLED(crtc_index));
+}
+
+void dc_drv_set_crtc_disable(struct dc_drm_device *dc_drm,
+ unsigned int crtc_index)
+{
+ struct dc_priv *priv = dev_get_drvdata(dc_drm->base.dev);
+
+ if (WARN_ON(crtc_index > 1))
+ return;
+
+ regmap_clear_bits(priv->gp_regmap, 0, CRTC_ENABLED(crtc_index));
+}
+
+bool dc_drv_crtc_is_enabled(struct dc_drm_device *dc_drm,
+ unsigned int crtc_index)
+{
+ struct dc_priv *priv = dev_get_drvdata(dc_drm->base.dev);
+ unsigned int val;
+ int ret;
+
+ if (WARN_ON(crtc_index > 1))
+ return false;
+
+ ret = regmap_read(priv->gp_regmap, 0, &val);
+ if (ret)
+ return false;
+
+ return !!(val & CRTC_ENABLED(crtc_index));
+}
+
static int dc_runtime_suspend(struct device *dev)
{
struct dc_priv *priv = dev_get_drvdata(dev);
diff --git a/drivers/gpu/drm/imx/dc/dc-drv.h b/drivers/gpu/drm/imx/dc/dc-drv.h
index eb61b8c76269..8283795f3c76 100644
--- a/drivers/gpu/drm/imx/dc/dc-drv.h
+++ b/drivers/gpu/drm/imx/dc/dc-drv.h
@@ -99,4 +99,11 @@ static inline int dc_subdev_get_id(const struct dc_subdev_info *info,
void dc_de_post_bind(struct dc_drm_device *dc_drm);
void dc_pe_post_bind(struct dc_drm_device *dc_drm);
+void dc_drv_set_crtc_enable(struct dc_drm_device *dc_drm,
+ unsigned int crtc_index);
+void dc_drv_set_crtc_disable(struct dc_drm_device *dc_drm,
+ unsigned int crtc_index);
+bool dc_drv_crtc_is_enabled(struct dc_drm_device *dc_drm,
+ unsigned int crtc_index);
+
#endif /* __DC_DRV_H__ */
--
2.43.0
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