[PATCH 2/3] mmc: mmci: stm32: do not use NEGEDGE in HS200 mode

[Christophe KERELLO]

Hello Mateusz,

On 10/31/26 13:07, Mateusz Nowicki wrote:
> RM0457 marks NEGEDGE as not applicable in HS200. With a clock divider it

No, it is not what it is written in the RM. If clkdiv is equal to 0, 
NEGEDGE has no effect.
NEGEDGE has an effect only when clkdiv > 0, so it can be used with HS200.

On ST downstream Linux Kernel, you can find following patch not already 
upstream:
mmc: mmci: stm32: use the delay block above 100 MHz on stm32mp25 SoC 
(Commit ca3b1cf)
By applying previous downstream patch + patch 3 of this patchset + 
using  original slew rate that was upstream on
this board (slew rate set to 2 for the clock IO, 1 for the others IOs), 
HS200 should run on a ST MP25 DK board at 100 MHz.

This patch breaks also MP13 SoC that is supporting HS200.

Regards,
Christophe Kerello.

> corrupts multi-block writes: on the STM32MP257F-DK (st,neg-edge, 200 MHz
> kernel clock, HS200 at 100 MHz) written data read back different. The
> same writes are correct without NEGEDGE.
>
> Fixes: 36240ef8665b ("mmc: mmci: add hs200 support for stm32 sdmmc")
> Cc: stable at vger.kernel.org
> Signed-off-by: Mateusz Nowicki <mateusz.nowicki at posteo.net>
> ---
> RM0457 describes HS200 only without a divider. If HS200 through a
> divider should not be used at all, the alternatives for the DK are:
>
> - Drop mmc-hs200-1_8v from the DK device tree. DDR52 is tested and only
>    about 5% slower than HS200 at 100 MHz (read/write 78/66 MiB/s against
>    82/68 MiB/s).
> - Drop st,neg-edge from the DK device tree. This also changes DDR52,
>    which was not tested without NEGEDGE.
> - Set the SDMMC2 kernel clock to 150 MHz in the firmware (OP-TEE). HS200
>    then runs without a divider (tested, 119/86 MiB/s).
>
> Which way is preferred?
>
>   drivers/mmc/host/mmci_stm32_sdmmc.c | 4 ++++
>   1 file changed, 4 insertions(+)
>
> diff --git a/drivers/mmc/host/mmci_stm32_sdmmc.c b/drivers/mmc/host/mmci_stm32_sdmmc.c
> index 9dc51859c2e5..d74efdff6ac2 100644
> --- a/drivers/mmc/host/mmci_stm32_sdmmc.c
> +++ b/drivers/mmc/host/mmci_stm32_sdmmc.c
> @@ -342,6 +342,10 @@ static void mmci_sdmmc_set_clkreg(struct mmci_host *host, unsigned int desired)
>   	clk |= host->clk_reg_add;
>   	clk |= ddr;
>   
> +	/* NEGEDGE is not applicable in HS200 (RM0457), with a divider it corrupts writes */
> +	if (host->mmc->ios.timing == MMC_TIMING_MMC_HS200)
> +		clk &= ~MCI_STM32_CLK_NEGEDGE;
> +
>   	if (host->mmc->ios.timing >= MMC_TIMING_UHS_SDR50)
>   		clk |= MCI_STM32_CLK_BUSSPEED;
>