[PATCH 06/10] irqchip/gic-v5: Honour ACPI ITS noncoherent flag

[Lorenzo Pieralisi]

On Mon, Nov 02, 2026 at 01:32:59PM +0000, Sascha Bischoff wrote:
> The ACPI ITS probe passes its noncoherent flag to
> gicv5_its_init_bases(), but the common initializer checks a DT
> property instead. For an ACPI ITS, this always selects coherent cache
> settings and skips the cache maintenance required for its tables.
> 
> Use the noncoherent argument, which both firmware paths already
> supply.
> 
> Fixes: a97efa5ba5946 ("irqchip/gic-v5: Add ACPI ITS probing")
> Cc: stable at vger.kernel.org
> Signed-off-by: Sascha Bischoff <sascha.bischoff at arm.com>
> ---
>  drivers/irqchip/irq-gic-v5-its.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/irqchip/irq-gic-v5-its.c b/drivers/irqchip/irq-gic-v5-its.c
> index 866c238f08dfe..c5d057f713134 100644
> --- a/drivers/irqchip/irq-gic-v5-its.c
> +++ b/drivers/irqchip/irq-gic-v5-its.c
> @@ -1135,7 +1135,7 @@ static int __init gicv5_its_init_bases(void __iomem *its_base, struct fwnode_han
>  			goto out_free_node;
>  	}
>  
> -	if (of_property_read_bool(np, "dma-noncoherent")) {
> +	if (noncoherent) {

Bah. This is a very stupid thinko. Apologies.

Acked-by: Lorenzo Pieralisi <lpieralisi at kernel.org>

>  		/*
>  		 * A non-coherent ITS implies that some cache levels cannot be
>  		 * used coherently by the cores and GIC. Our only option is to mark
> 
> -- 
> 2.34.1
>