[PATCH v2 0/2] Add Amlogic A9 I3C support
Junyi Zhao via B4 Relay
devnull+junyi.zhao.amlogic.com at kernel.org
Mon Nov 2 03:05:38 PST 2026
Amlogic A9 SoCs integrate the Silvaco I3C IP, but their peripheral
clock setup differs from the original implementation: the EE-domain
controller (amlogic,a9-i3c) takes two clocks, "pclk" and "fast_clk",
while the AO-domain controller (amlogic,a9-ao-i3c) exposes only
"pclk" and derives its bus clock from an internal divider inside the
controller's own register region.
This series consists of:
- Add a vendor_init callback for the clock setup and a
vendor_quirks field for AO-specific behaviour to the Silvaco I3C
master driver, and enable the existing Silvaco workaround quirks
for both Amlogic variants.
- Add the Amlogic compatibles and per-variant clock
constraints to the silvaco,i3c-master binding schema.
Verified on Amlogic A9 (BY401) with both EE and AO controller
instances. dt_binding_check and dtbs_check pass with this series.
Signed-off-by: Junyi Zhao <junyi.zhao at amlogic.com>
---
Changes in v2:
- No need rework the Silvaco I3C driver.
- Based on vanilla driver, adapt A9 SoCS through callback
and quirks to handle the variant.
- Link to v1: https://patch.msgid.link/20261019-a9_i3c-v1-0-329d819d621f@amlogic.com
---
Junyi Zhao (2):
i3c: master: svc: Add amlogic a9 support
dt-bindings: i3c: silvaco,i3c-master: Add Amlogic A9 support
.../bindings/i3c/silvaco,i3c-master.yaml | 24 ++-
drivers/i3c/master/svc-i3c-master.c | 214 ++++++++++++++++++++-
2 files changed, 231 insertions(+), 7 deletions(-)
---
base-commit: aac26bee2287c88af5be5a5ff96d783b19a28790
change-id: 20261010-a9_i3c-9d5245d094c8
Best regards,
--
Junyi Zhao <junyi.zhao at amlogic.com>
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