[PATCH v3 1/7] dt-bindings: mailbox: Add Allwinner A523 message box

[Krzysztof Kozlowski]

On Sun, Nov 01, 2026 at 12:57:29PM -0600, Tim Michals wrote:
> The Allwinner A523, A527 and T527 (sun55i) message box connects the
> Cortex-A55 host with the HiFi4 DSP, the CPUS power management core and
> the XuanTie E906 RISC-V core. Each processor has its own register bank.
> A sender writes a message into the receiving processor's bank, and a
> channel has an 8-entry FIFO in each direction.
> 
> The host bank has 12 channels, four for each remote processor. The
> binding lists all four banks, since the host writes to and reads the
> FIFO status of the remote banks, and lists the bank interrupts in the
> same order: the host bank read interrupt and the write interrupts of
> the three remote banks, which every A523 has. Each bank has its own bus
> clock and reset, and an unclocked bank drops writes, so all four are
> described. The optional allwinner,tx-done-irq property selects TX
> completion by the receiver bank's write interrupt instead of polling.
>

Sashiko comment looks valid, rest seems ok.

Best regards,
Krzysztof