[PATCH 8/9] arm64: dts: broadcom: bcm2712: Add DMA controllers
Peter Robinson
pbrobinson at gmail.com
Mon Nov 2 01:06:58 PST 2026
Describe the BCM2712 legacy DMA channels (0-5) and the DMA4
channels (6-11) as separate nodes, both disabled for boards
to enable. Node labels follow the Raspberry Pi downstream tree.
Signed-off-by: Peter Robinson <pbrobinson at gmail.com>
---
arch/arm64/boot/dts/broadcom/bcm2712.dtsi | 40 +++++++++++++++++++++++
1 file changed, 40 insertions(+)
diff --git a/arch/arm64/boot/dts/broadcom/bcm2712.dtsi b/arch/arm64/boot/dts/broadcom/bcm2712.dtsi
index edae2f3584a8d..be4e94c9e7695 100644
--- a/arch/arm64/boot/dts/broadcom/bcm2712.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcm2712.dtsi
@@ -546,6 +546,46 @@ axi: axi {
<0x18 0x00000000 0x18 0x00000000 0x04 0x00000000>,
<0x1c 0x00000000 0x1c 0x00000000 0x04 0x00000000>;
+ dma32: dma-controller at 1000010000 {
+ compatible = "brcm,bcm2712-dma";
+ reg = <0x10 0x00010000 0x0 0x600>;
+ interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "dma0",
+ "dma1",
+ "dma2",
+ "dma3",
+ "dma4",
+ "dma5";
+ #dma-cells = <1>;
+ brcm,dma-channel-mask = <0x0035>;
+ status = "disabled";
+ };
+
+ dma40: dma-controller at 1000010600 {
+ compatible = "brcm,bcm2712-dma";
+ reg = <0x10 0x00010600 0x0 0x600>;
+ interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>, /* dma4 6 */
+ <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>, /* dma4 7 */
+ <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>, /* dma4 8 */
+ <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>, /* dma4 9 */
+ <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>, /* dma4 10 */
+ <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>; /* dma4 11 */
+ interrupt-names = "dma6",
+ "dma7",
+ "dma8",
+ "dma9",
+ "dma10",
+ "dma11";
+ #dma-cells = <1>;
+ brcm,dma-channel-mask = <0x0fc0>;
+ status = "disabled";
+ };
+
pcie0: pcie at 1000100000 {
compatible = "brcm,bcm2712-pcie";
reg = <0x10 0x00100000 0x00 0x9310>;
--
2.56.0
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