Document the dedicated DisplayPort PHY on CIX Sky1, including the
required APB clock shared with the DPTx controller, reset, and the
optional cix,external-dp property to select the external DP swing
table instead of the default low-voltage values.
Add a MAINTAINERS entry for the binding and driver.
Signed-off-by: Luo Liu <Luo.Liu at cixtech.com>
Reviewed-by: Rob Herring (Arm) <robh at kernel.org>
---
.../bindings/phy/cix,sky1-dp-phy.yaml | 67 +++++++++++++++++++
MAINTAINERS | 8 +++
2 files changed, 75 insertions(+)
create mode 100644 Documentation/devicetree/bindings/phy/cix,sky1-dp-phy.yaml
diff --git a/Documentation/devicetree/bindings/phy/cix,sky1-dp-phy.yaml b/Documentation/devicetree/bindings/phy/cix,sky1-dp-phy.yaml
new file mode 100644
index 000000000000..ea19f0aa0b1c
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/cix,sky1-dp-phy.yaml
@@ -0,0 +1,67 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/phy/cix,sky1-dp-phy.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: CIX Sky1 DisplayPort PHY
+
+maintainers:
+ - Luo Liu <Luo.Liu at cixtech.com>
+
+description:
+ The CIX Sky1 DP PHY provides the PMA/CDB register interface for the
+ dedicated DisplayPort instance on CIX Sky1.
+
+ The PHY APB clock is physically shared with the DPTx controller.
+
+properties:
+ compatible:
+ const: cix,sky1-dp-phy
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ maxItems: 1
+ description: APB register interface clock
+
+ clock-names:
+ const: apb
+
+ resets:
+ maxItems: 1
+ description: PHY hardware reset
+
+ "#phy-cells":
+ const: 0
+
+ cix,external-dp:
+ type: boolean
+ description:
+ Use voltage swing values suitable for an external DisplayPort
+ connector instead of the default low-voltage values.
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - clock-names
+ - resets
+ - "#phy-cells"
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/cix,sky1.h>
+ #include <dt-bindings/reset/cix,sky1-s5-system-control.h>
+
+ phy at 1414c000 {
+ compatible = "cix,sky1-dp-phy";
+ reg = <0x1414c000 0x4000>;
+ clocks = <&scmi_clk CLK_TREE_DPC2_APBCLK>;
+ clock-names = "apb";
+ resets = <&s5_syscon SKY1_DP_PHY_RST_N>;
+ #phy-cells = <0>;
+ };
diff --git a/MAINTAINERS b/MAINTAINERS
index 3a19da74d00c..b46d0f4220a9 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -6360,6 +6360,14 @@ M: Satish Kharat <satishkh at cisco.com>
S: Supported
F: drivers/infiniband/hw/usnic/
+CIX SKY1 DISPLAYPORT PHY DRIVER
+M: Luo Liu <Luo.Liu at cixtech.com>
+R: CIX Linux Kernel Upstream Group <cix-kernel-upstream at cixtech.com>
+L: linux-phy at lists.infradead.org
+S: Maintained
+F: Documentation/devicetree/bindings/phy/cix,sky1-dp-phy.yaml
+F: drivers/phy/cix/
+
CLANG CONTEXT ANALYSIS
M: Marco Elver <elver at google.com>
R: Bart Van Assche <bvanassche at acm.org>
--
2.25.1