[PATCH v3 0/6] arch, mm/execmem: resolve confusion about set_direct_map_valid_noflush()

[patchwork-bot+linux-riscv at kernel.org]

Hello:

This series was applied to riscv/linux.git (fixes)
by Andrew Morton <akpm at linux-foundation.org>:

On Thu, 03 Sep 2026 12:28:26 +0300 you wrote:
> Recent discussion about implementation of execmem's ROX caches on arm64
> revealed a confusion about how set_direct_map_valid_noflush()
> implemented on different architectures.
> 
> On arm64 it sets or clears the PTE_VALID bit marking a PTE as present or
> not present.
> 
> [...]

Here is the summary with links:
  - [v3,1/6] set_memory: add number of pages parameter to set_direct_map APIs
    https://git.kernel.org/riscv/c/be7dacb9c1d4
  - [v3,2/6] mm/vmalloc: set area's page_order after allocation succeeds
    https://git.kernel.org/riscv/c/40702f168a9e
  - [v3,3/6] mm/vmalloc: constify vm parameter of get_vm_area_page_order()
    https://git.kernel.org/riscv/c/1f73dfdeb9c2
  - [v3,4/6] mm/vmalloc: make set_area_direct_map HUGE_VMAP friendly
    https://git.kernel.org/riscv/c/86dc0280b807
  - [v3,5/6] mm/execmem: use VM_FLUSH_RESET_PERMS for ROX cache allocations
    https://git.kernel.org/riscv/c/4c4b2ed5b783
  - [v3,6/6] Revert "arch: introduce set_direct_map_valid_noflush()"
    https://git.kernel.org/riscv/c/0e774fdb2ed6

You are awesome, thank you!
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