[PATCH v2] arm64: dts: rockchip: Enable the NPU on LubanCat 4
Heiko Stuebner
heiko at sntech.de
Sun Nov 1 14:15:20 PST 2026
On Thu, 06 Aug 2026 00:57:06 +0800, Pufan Jin wrote:
> The three RKNN cores and their IOMMUs are disabled by default in the SoC
> dtsi, so the board has to describe the NPU supply before they can be
> enabled.
>
> This board feeds both the NPU logic and its SRAM from a single RK8602
> output on i2c1. The vendor DTS makes that explicit by giving the same
> regulator node two labels, vdd_npu_s0 and vdd_npu_mem_s0, and then
> handing one to rknpu-supply and the other to mem-supply. There is no
> separate memory rail to describe, so npu-supply and sram-supply both
> point at vdd_npu_s0. The binding requires both properties.
>
> [...]
Applied, thanks!
[1/1] arm64: dts: rockchip: Enable the NPU on LubanCat 4
commit: 77026e98dce776dc45ca7bc77c3d2ba95c39f6ca
Best regards,
--
Heiko Stuebner <heiko at sntech.de>
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