[PATCH v5 1/3] dt-bindings: imx6q-pcie: Add optional interrupt entries for intr, aer and pme

[Krzysztof Kozlowski]

On Thu, May 21, 2026 at 05:32:53PM +0800, Richard Zhu wrote:
> The i.MX95 PCIe controller introduces three dedicated hardware interrupt
> lines:
> - intr: general controller events
> - aer: Advanced Error Reporting
> - pme: Power Management Events
> 
> Earlier i.MX PCIe variants (imx6q, imx6sx, imx6qp, imx7d, imx8mm, imx8mp,
> imx8mq, imx8q) do not have these dedicated interrupt lines.
> 
> PCIe basic functionality (enumeration, configuration, and data transfer)
> works correctly regardless of whether these interrupts are present. Mark
> these interrupts as optional to maintain backward compatibility with SoCs
> that lack these hardware interrupt lines.
> 
> Signed-off-by: Richard Zhu <hongxing.zhu at nxp.com>
> Reviewed-by: Frank Li <Frank.Li at nxp.com>
> ---
>  Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml | 6 ++++++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
> index 9d1349855b42..cf709132ff1e 100644
> --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
> +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
> @@ -58,12 +58,18 @@ properties:
>      items:
>        - description: builtin MSI controller.
>        - description: builtin DMA controller.
> +      - description: PCIe event interrupt.
> +      - description: builtin AER SPI standalone interrupt line.
> +      - description: builtin PME SPI standalone interrupt line.

Same feedback as before, nothing improved. Schema says imx6q has these
interrupts, commit msg says otherwise.

Please read entire binding - you would easily guess what is there to do.
And you already received such comments.

NAK