[PATCH v1 14/26] s390: Introduce Query Available Arm features
Steffen Eiden
seiden at linux.ibm.com
Fri May 29 08:55:47 PDT 2026
QAAF enables s390 hosts to gain information about the support
and handling of various arm features supported by the machine.
Function code 1 provides general information about available formats,
machine defined content of system/id register, and other various
information for running arm guests.
Co-developed-by: Andreas Grapentin <gra at linux.ibm.com>
Signed-off-by: Andreas Grapentin <gra at linux.ibm.com>
Signed-off-by: Steffen Eiden <seiden at linux.ibm.com>
---
arch/s390/include/asm/kvm_host_arm64_types.h | 96 ++++++++++++++++++++
arch/s390/include/asm/sae.h | 28 ++++++
arch/s390/tools/opcodes.txt | 1 +
3 files changed, 125 insertions(+)
diff --git a/arch/s390/include/asm/kvm_host_arm64_types.h b/arch/s390/include/asm/kvm_host_arm64_types.h
index 3882d5462a05..16f7018a1714 100644
--- a/arch/s390/include/asm/kvm_host_arm64_types.h
+++ b/arch/s390/include/asm/kvm_host_arm64_types.h
@@ -126,4 +126,100 @@ struct kvm_sae_save_area {
} __packed __aligned(PAGE_SIZE);
static_assert(sizeof(struct kvm_sae_save_area) == PAGE_SIZE);
+#define QAAF_FC_QMC 1
+
+/* QAAF Query Model Capabilities */
+struct qaaf_qmc_block {
+ u64 _0000; /* 0x0000 */
+ u8 ssdf; /* 0x0008 */
+ u8 _0009; /* 0x0009 */
+ u8 ssaf; /* 0x000a */
+ u8 _000b[3]; /* 0x000b */
+ u16 maxncpu; /* 0x000e */
+ u64 regs[0x1fe]; /* 0x0010 */
+} __aligned(PAGE_SIZE);
+static_assert(sizeof(struct qaaf_qmc_block) == PAGE_SIZE);
+
+union qaaf_block {
+ struct qaaf_qmc_block qmc;
+} __aligned(PAGE_SIZE);
+static_assert(sizeof(union qaaf_block) == PAGE_SIZE);
+
+/*
+ * Keep in sync with mapping from SYS_* to QAAF_* in feature.c!
+ */
+enum {
+ QAAF_REG_MIDR_EL1 = 0x02,
+ /* 0x03 -0x06 reserved */
+ QAAF_REG_MPIDR_EL1 = 0x07,
+ QAAF_REG_REVIDR_EL1 = 0x08,
+ /* 0x09 reserved */
+ QAAF_REG_ID_PFR0_EL1 = 0x0a,
+ QAAF_REG_ID_PFR1_EL1 = 0x0b,
+ QAAF_REG_ID_DFR0_EL1 = 0x0c,
+ QAAF_REG_ID_AFR0_EL1 = 0x0d,
+ QAAF_REG_ID_MMFR0_EL1 = 0x0e,
+ QAAF_REG_ID_MMFR1_EL1 = 0x0f,
+ QAAF_REG_ID_MMFR2_EL1 = 0x10,
+ QAAF_REG_ID_MMFR3_EL1 = 0x11,
+ QAAF_REG_ID_ISAR0_EL1 = 0x12,
+ QAAF_REG_ID_ISAR1_EL1 = 0x13,
+ QAAF_REG_ID_ISAR2_EL1 = 0x14,
+ QAAF_REG_ID_ISAR3_EL1 = 0x15,
+ QAAF_REG_ID_ISAR4_EL1 = 0x16,
+ QAAF_REG_ID_ISAR5_EL1 = 0x17,
+ QAAF_REG_ID_MMFR4_EL1 = 0x18,
+ QAAF_REG_ID_ISAR6_EL1 = 0x19,
+ QAAF_REG_MVFR0_EL1 = 0x1a,
+ QAAF_REG_MVFR1_EL1 = 0x1b,
+ QAAF_REG_MVFR2_EL1 = 0x1c,
+ /* 0x1d reserved */
+ QAAF_REG_ID_PFR2_EL1 = 0x1e,
+ QAAF_REG_ID_DFR1_EL1 = 0x1f,
+ QAAF_REG_ID_MMFR5_EL1 = 0x20,
+ /* 0x21 reserved */
+ QAAF_REG_ID_AA64PFR0_EL1 = 0x22,
+ QAAF_REG_ID_AA64PFR1_EL1 = 0x23,
+ QAAF_REG_ID_AA64PFR2_EL1 = 0x24,
+ /* 0x25 reserved */
+ QAAF_REG_ID_AA64ZFR0_EL1 = 0x26,
+ QAAF_REG_ID_AA64SMFR0_EL1 = 0x27,
+ /* 0x28 reserved */
+ QAAF_REG_ID_AA64FPFR0_EL1 = 0x29,
+ QAAF_REG_ID_AA64DFR0_EL1 = 0x2a,
+ QAAF_REG_ID_AA64DFR1_EL1 = 0x2b,
+ QAAF_REG_ID_AA64DFR2_EL1 = 0x2c,
+ /* 0x2d reserved */
+ QAAF_REG_ID_AA64AFR0_EL1 = 0x2e,
+ QAAF_REG_ID_AA64AFR1_EL1 = 0x2f,
+ /* 0x30,0x31 reserved */
+ QAAF_REG_ID_AA64ISAR0_EL1 = 0x32,
+ QAAF_REG_ID_AA64ISAR1_EL1 = 0x33,
+ QAAF_REG_ID_AA64ISAR2_EL1 = 0x34,
+ QAAF_REG_ID_AA64ISAR3_EL1 = 0x35,
+ /* 0x36-0x39 reserved */
+ QAAF_REG_ID_AA64MMFR0_EL1 = 0x3a,
+ QAAF_REG_ID_AA64MMFR1_EL1 = 0x3b,
+ QAAF_REG_ID_AA64MMFR2_EL1 = 0x3c,
+ QAAF_REG_ID_AA64MMFR3_EL1 = 0x3d,
+ QAAF_REG_ID_AA64MMFR4_EL1 = 0x3e,
+ /* 0x3f-0x41 reserved */
+ QAAF_REG_CNTFRQ_EL0 = 0x42,
+ QAAF_REG_CTR_EL0 = 0x43,
+ /* 0x44-0x49 reserved */
+ QAAF_IRPTC = 0x4a,
+ /* 0x4b reserved */
+ QAAF_REG_ICH_VTR_EL2 = 0x4c,
+ QAAF_GIC_ATTR = 0x4d,
+ /* 0x4E-0x51 reserved */
+ QAAF_REG_PMMIR_EL1 = 0x52,
+ QAAF_REG_PMCR_EL0 = 0x53,
+ QAAF_REG_PMCEID0_EL0 = 0x54,
+ QAAF_REG_PMCEID1_EL0 = 0x55,
+ /* 0x56-0x1ff reserved */
+ _QAAF_MAX
+};
+
+static_assert(sizeof(struct qaaf_qmc_block) / 8 + 1 >= _QAAF_MAX);
+
#endif /* ASM_KVM_HOST_ARM64_TYPES_H */
diff --git a/arch/s390/include/asm/sae.h b/arch/s390/include/asm/sae.h
index 1d9a16b91b23..f6f79443d6ce 100644
--- a/arch/s390/include/asm/sae.h
+++ b/arch/s390/include/asm/sae.h
@@ -110,5 +110,33 @@ static __always_inline void lasrm(struct kvm_sae_save_area *save_area)
);
}
+/**
+ * qaaf() - Query Available Arm Features
+ * @gr0: QAAF function code, placed in greg 0
+ * @qaaf_block: Pointer to the page for the output
+ *
+ * Perform QAAF. The result ins written to qaaf_block.
+ */
+static __always_inline void qaaf(u64 gr0, union qaaf_block *qaaf_block)
+{
+ asm volatile(
+ " lgr 0,%[r0]\n"
+ " .insn rre,0xb9ad0000,%[r1],0"
+ : "=m"(*qaaf_block)
+ : [r1] "a"(qaaf_block), [r0] "d"(gr0)
+ : "r0"
+ );
+}
+
+/**
+ * qaaf_qmc() - Query Available Arm Features for Model Capabilities
+ * @qmc: Pointer to qaaf_qmc_block structure to receive model capabilities
+ *
+ */
+static __always_inline void qaaf_qmc(struct qaaf_qmc_block *qmc)
+{
+ qaaf(QAAF_FC_QMC, (union qaaf_block *)qmc);
+}
+
#endif /* !__ASSEMBLER__ */
#endif /* __ASM_S390_SAE_H */
diff --git a/arch/s390/tools/opcodes.txt b/arch/s390/tools/opcodes.txt
index 18af14071290..fd5483107961 100644
--- a/arch/s390/tools/opcodes.txt
+++ b/arch/s390/tools/opcodes.txt
@@ -600,6 +600,7 @@ b9a7 stiasrm RRE_R0
b9aa lptea RRF_RURR2
b9ab essa RRF_U0RR
b9ac irbm RRE_RR
+b9ad qaaf RRE_R0
b9ae rrbm RRE_RR
b9af pfmf RRE_RR
b9b0 cu14 RRF_U0RR
--
2.53.0
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