[PATCH v2 03/39] irqchip/gic-v5: Setup gic_kvm_info on ACPI hosts
Sascha Bischoff
Sascha.Bischoff at arm.com
Fri May 29 07:41:27 PDT 2026
On Thu, 2026-05-28 at 09:14 +0200, Lorenzo Pieralisi wrote:
> On Thu, May 21, 2026 at 02:50:09PM +0000, Sascha Bischoff wrote:
> > Device-tree based GICv5 probing already passes the IRS details and
> > maintenance interrupt to KVM, but the ACPI path only initialises
> > the
> > irqchip and installs the ACPI IRQ model. As a result, KVM never
> > sees
> > the GICv5 host information required to probe the vGIC on ACPI
> > systems.
> >
> > Add the ACPI equivalent of the DT KVM setup. Parse the MADT GICC
> > entries for the maintenance interrupt, require all relevant entries
> > to
> > agree, register the interrupt as a GICv5 PPI-encoded GSI, and pass
> > the
> > resulting IRQ together with the IRS base and coherency information
> > to
> > KVM. Native GICv5 does not require a maintenance interrupt unless
> > the
> > legacy GICv3-compatible CPU interface is present, so preserve the
> > existing no-maintenance-IRQ handling for that case.
> >
> > Signed-off-by: Sascha Bischoff <sascha.bischoff at arm.com>
> > ---
> > drivers/irqchip/irq-gic-v5.c | 103
> > +++++++++++++++++++++++++++++++++--
> > 1 file changed, 98 insertions(+), 5 deletions(-)
> >
> > diff --git a/drivers/irqchip/irq-gic-v5.c b/drivers/irqchip/irq-
> > gic-v5.c
> > index 707deabbf2f63..ccd1ec69a6ab2 100644
> > --- a/drivers/irqchip/irq-gic-v5.c
> > +++ b/drivers/irqchip/irq-gic-v5.c
> > @@ -1126,7 +1126,7 @@ static void gicv5_set_cpuif_idbits(void)
> > #ifdef CONFIG_KVM
> > static struct gic_kvm_info gic_v5_kvm_info __initdata;
> >
> > -static void __init gic_of_setup_kvm_info(struct device_node *node)
> > +static void __init gic_setup_kvm_info(unsigned int maint_irq)
> > {
> > struct gicv5_irs_chip_data *irs_data =
> > gicv5_irs_get_chip_data();
> >
> > @@ -1140,13 +1140,14 @@ static void __init
> > gic_of_setup_kvm_info(struct device_node *node)
> > return;
> > }
> >
> > - gic_v5_kvm_info.type = GIC_V5;
> > + if (WARN_ON(!irs_data))
> > + return;
> >
> > + gic_v5_kvm_info.type = GIC_V5;
> > gic_v5_kvm_info.gicv5_irs.base = irs_data->irs_base;
> > gic_v5_kvm_info.gicv5_irs.non_coherent = !!(irs_data-
> > >flags & IRS_FLAGS_NON_COHERENT);
> > -
> > - /* GIC Virtual CPU interface maintenance interrupt */
> > - gic_v5_kvm_info.maint_irq = irq_of_parse_and_map(node, 0);
> > + gic_v5_kvm_info.maint_irq = maint_irq;
> > + gic_v5_kvm_info.no_maint_irq_mask = false;
> >
> > /*
> > * We require an MI if we have legacy support, but don't,
> > otherwise.
> > @@ -1162,10 +1163,101 @@ static void __init
> > gic_of_setup_kvm_info(struct device_node *node)
> >
> > vgic_set_kvm_info(&gic_v5_kvm_info);
> > }
> > +
> > +static void __init gic_of_setup_kvm_info(struct device_node *node)
> > +{
> > + /* GIC Virtual CPU interface maintenance interrupt */
> > + gic_setup_kvm_info(irq_of_parse_and_map(node, 0));
> > +}
> > +
> > +#ifdef CONFIG_ACPI
> > +struct gicv5_acpi_kvm_info {
> > + u32 maint_irq;
> > + int maint_irq_mode;
> > +};
> > +
> > +static struct gicv5_acpi_kvm_info acpi_v5_kvm_info __initdata;
> > +
> > +static int __init gic_acpi_parse_virt_madt_gicc(union
> > acpi_subtable_headers *header,
> > + const unsigned
> > long end)
> > +{
> > + struct acpi_madt_generic_interrupt *gicc =
> > + (struct acpi_madt_generic_interrupt *)header;
> > + static int first_madt = true;
> > + int maint_irq_mode;
> > +
> > + if (!(gicc->flags &
> > + (ACPI_MADT_ENABLED |
> > ACPI_MADT_GICC_ONLINE_CAPABLE)))
> > + return 0;
> > +
> > + maint_irq_mode = (gicc->flags & ACPI_MADT_VGIC_IRQ_MODE) ?
> > + ACPI_EDGE_SENSITIVE :
> > ACPI_LEVEL_SENSITIVE;
> > +
> > + if (first_madt) {
> > + first_madt = false;
> > +
> > + acpi_v5_kvm_info.maint_irq = gicc->vgic_interrupt;
> > + acpi_v5_kvm_info.maint_irq_mode = maint_irq_mode;
> > + return 0;
> > + }
> > +
> > + /* The maintenance interrupt must be the same for every
> > GICC entry. */
> > + if (acpi_v5_kvm_info.maint_irq != gicc->vgic_interrupt ||
> > + acpi_v5_kvm_info.maint_irq_mode != maint_irq_mode)
> > + return -EINVAL;
> > +
> > + return 0;
> > +}
> > +
> > +static bool __init gic_acpi_collect_virt_info(void)
> > +{
> > + int count;
> > +
> > + acpi_v5_kvm_info.maint_irq = 0;
> > + acpi_v5_kvm_info.maint_irq_mode = 0;
>
> Nit: there is no need to zero them.
Have dropped this.
>
> > +
> > + count =
> > acpi_table_parse_madt(ACPI_MADT_TYPE_GENERIC_INTERRUPT,
> > +
> > gic_acpi_parse_virt_madt_gicc, 0);
> > +
> > + return count > 0;
> > +}
> > +
> > +static void __init gic_acpi_setup_kvm_info(void)
> > +{
> > + unsigned int maint_irq = 0;
> > + int irq;
> > +
> > + if (!gic_acpi_collect_virt_info()) {
> > + pr_warn("Unable to get hardware information used
> > for virtualization\n");
> > + return;
> > + }
> > +
> > + if (acpi_v5_kvm_info.maint_irq) {
> > + u32 gsi = FIELD_PREP(GICV5_HWIRQ_TYPE,
> > GICV5_HWIRQ_TYPE_PPI) |
> > + FIELD_PREP(GICV5_HWIRQ_ID,
> > acpi_v5_kvm_info.maint_irq);
>
> What you get from the MADT table is the GSI already encoded.
Ah, yes. That makes sense. Although what I have here isn't strictly
harmful, it is pointless. I've dropped this and directly use what we
get from the MADT.
>
> > +
> > + irq = acpi_register_gsi(NULL, gsi,
> > + acpi_v5_kvm_info.maint_irq
> > _mode,
> > + ACPI_ACTIVE_HIGH);
> > + if (irq <= 0)
> > + return;
>
> As we discussed offline, we are resolving the IRQ before knowing
> whether
> FEAT_GCIE_LEGACY is supported. I don't think it is specified what
> that
> GSI value in the GICC should be when !FEAT_GCIE_LEGACY, I will ask
> for
> a spec update on the matter.
It would be good if it was obviously marked as something easily
identifiable as a non-valid value in that case.
Please do let me know if you think that I should pull the
FEAT_GCIE_LEGACY check in here to skip the whole MI extraction in the
first place if we definitely don't need it. I was trying to avoid
duplicating it, but maybe it is best that we explicitly check early
with ACPI to avoid this exact situation.
>
> > +
> > + maint_irq = irq;
> > + }
> > +
> > + gic_setup_kvm_info(maint_irq);
> > +}
> > +#endif
> > #else
> > static inline void __init gic_of_setup_kvm_info(struct device_node
> > *node)
> > {
> > }
> > +
> > +#ifdef CONFIG_ACPI
> > +static inline void __init gic_acpi_setup_kvm_info(void)
> > +{
> > +}
> > +#endif
> > #endif // CONFIG_KVM
>
> All of the above is almost identical to GICv3 code retrieving the
> maintenance
> IRQ, which is not surprising the only difference is where you store
> it.
>
> I think it is fine to leave this as is, writing a helper that we can
> reuse
> in v3 and v5 drivers seems overkill at present.
For right now I'll leave this as is, but will note the future clean-up
opportunity.
>
> Thanks,
> Lorenzo
Thanks a lot,
Sascha
>
> > static int __init gicv5_init_common(struct fwnode_handle
> > *parent_domain)
> > @@ -1264,6 +1356,7 @@ static int __init gic_acpi_init(union
> > acpi_subtable_headers *header, const unsig
> > goto out_irs;
> >
> > acpi_set_irq_model(ACPI_IRQ_MODEL_GIC_V5,
> > gic_v5_get_gsi_domain_id);
> > + gic_acpi_setup_kvm_info();
> >
> > return 0;
> >
> > --
> > 2.34.1
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