[PATCH] arm64: dts: s32g3: Fix SWT8 watchdog address

Daniel Lezcano daniel.lezcano at oss.qualcomm.com
Thu May 28 07:10:51 PDT 2026


On 5/28/26 14:03, Krzysztof Kozlowski wrote:
> Add missing hex annotation to fix the SWT8 watchdog address in 'reg'
> property, as reported by dtc W=1:
> 
>    s32g3.dtsi:863.27-869.5: Warning (simple_bus_reg): /soc at 0/watchdog at 40500000: simple-bus unit address format error, expected "269fb20"
> 
> Lack of hex '0x' meant address would be interpreted as decimal thus
> completely different value used as this device MMIO.  If device was
> enabled this could lead to corruption of other device address space and
> broken boot.
> 
> Cc: <stable at vger.kernel.org>
> Fixes: 6db84f042745 ("arm64: dts: s32g3: Add the Software Timer Watchdog (SWT) nodes")
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski at oss.qualcomm.com>

Reviewed-by: Daniel Lezcano <daniel.lezcano at oss.qualcomm.com>

Thanks for the fix

> ---
>   arch/arm64/boot/dts/freescale/s32g3.dtsi | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/boot/dts/freescale/s32g3.dtsi b/arch/arm64/boot/dts/freescale/s32g3.dtsi
> index e314f3c7d61d..7e28dff53a86 100644
> --- a/arch/arm64/boot/dts/freescale/s32g3.dtsi
> +++ b/arch/arm64/boot/dts/freescale/s32g3.dtsi
> @@ -862,7 +862,7 @@ gmac0mdio: mdio {
>   
>   		swt8: watchdog at 40500000 {
>   			compatible = "nxp,s32g3-swt", "nxp,s32g2-swt";
> -			reg = <40500000 0x1000>;
> +			reg = <0x40500000 0x1000>;
>   			clocks = <&clks 0x3a>, <&clks 0x3b>, <&clks 0x3b>;
>   			clock-names = "counter", "module", "register";
>   			status = "disabled";




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