[PATCH 1/1] pinctrl: nuvoton: ma35d1: fix MFP register offset and pin table

[Linus Walleij]

On Mon, May 11, 2026 at 5:18 AM Joey Lu <a0987203069 at gmail.com> wrote:

> Each GPIO bank has two 32-bit MFP registers: MFPL covering pins 0-7
> at the bank base offset, and MFPH covering pins 8-15 at base offset+4.
> ma35_pinctrl_parse_groups() computed the register address without
> accounting for this split, so any pin with an index >= 8 within its
> bank was written to the wrong register.
>
> Also fix the pin descriptor table in pinctrl-ma35d1.c: switch from
> sequential to 16-per-bank pin numbering, add missing PC8-PC11 pins
> and their mux options, and remove the duplicate PN10-PN15 entries.
>
> Fixes: f805e356313b ("pinctrl: nuvoton: Add ma35d1 pinctrl and GPIO driver")
> Signed-off-by: Joey Lu <a0987203069 at gmail.com>

No reaction from reviewers so patch applied!

Yours,
Linus Walleij