[PATCH] KVM: arm64: PMU: Preserve AArch32 counter low bits

Marc Zyngier maz at kernel.org
Wed May 27 03:35:22 PDT 2026


On Tue, 26 May 2026 15:46:40 +0800, Qiang Ma wrote:
> AArch32 writes to PMU event counters cannot update the top 32 bits,
> even when PMUv3p5 makes the counters 64-bit. KVM therefore needs to
> preserve the existing high half and only update the low half written by
> the guest, unless the caller explicitly forces a full reset through
> PMCR.P.
> 
> The current code masks @val down to the old high half before taking
> lower_32_bits(val), which means the low half is always zero. As a
> result, AArch32 writes to event counters discard the guest-provided low
> 32 bits instead of storing them.
> 
> [...]

Applied to fixes, thanks!

[1/1] KVM: arm64: PMU: Preserve AArch32 counter low bits
      commit: 1750ad1388e03fb27068cd1f22c9c8b4590fe936

Cheers,

	M.
-- 
Without deviation from the norm, progress is not possible.





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