[PATCH 2/2] ARM: dts: aspeed: sanmiguel: Fix the CPU_CHIPTHROT linename

[Andrew Jeffery]

Hi Potin,

On Sat, 2026-05-23 at 10:28 +0800, Potin Lai wrote:
> Fix the GPIO linenames for CPU_CHIPTHROT signals.
> 
> The signals were incorrectly marked as output ("-O") while they are
> actually input signals ("-I").
> 
> - B0_M0_CPU_CHIPTHROT_L-O -> B0_M0_CPU_CHIPTHROT_L-I
> - B1_M0_CPU_CHIPTHROT_L-O -> B1_M0_CPU_CHIPTHROT_L-I

I dropped this list when applying the patch because it's evident from
the diff.

Andrew

> 
> Signed-off-by: Potin Lai <potin.lai at quantatw.com>
> ---
>  arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-sanmiguel.dts | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-sanmiguel.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-sanmiguel.dts
> index 61dbef45f8b0..d7ed497d7227 100644
> --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-sanmiguel.dts
> +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-sanmiguel.dts
> @@ -224,7 +224,7 @@ hpm0_ioexp_20: gpio at 20 {
>  			"B0_M0_LEAK_DETECT_ALERT_L-I",
>  			"B0_M0_RUN_POWER_EN-O",
>  			"B0_M0_RUN_POWER_PG-I",
> -			"B0_M0_CPU_CHIPTHROT_L-O",
> +			"B0_M0_CPU_CHIPTHROT_L-I",
>  			"B0_M0_SHDN_REQ_L-O",
>  			"B0_M0_CPU_SHDN_OK_L-I",
>  			"B0_M0_CPLD_READY-I",
> @@ -398,7 +398,7 @@ hpm1_ioexp_20: gpio at 20 {
>  			"B1_M0_LEAK_DETECT_ALERT_L-I",
>  			"B1_M0_RUN_POWER_EN-O",
>  			"B1_M0_RUN_POWER_PG-I",
> -			"B1_M0_CPU_CHIPTHROT_L-O",
> +			"B1_M0_CPU_CHIPTHROT_L-I",
>  			"B1_M0_SHDN_REQ_L-O",
>  			"B1_M0_CPU_SHDN_OK_L-I",
>  			"B1_M0_CPLD_READY-I",