[PATCH v15 0/3] of: parsing of multi #{iommu,msi}-cells in maps
Vijayanand Jitta
vijayanand.jitta at oss.qualcomm.com
Tue May 26 02:45:55 PDT 2026
On 5/26/2026 11:42 AM, Krzysztof Kozlowski wrote:
> On Wed, May 20, 2026 at 01:32:39PM +0530, Vijayanand Jitta wrote:
>> So far our parsing of {iommu,msi}-map properties has always blindly
>> assumed that the output specifiers will always have exactly 1 cell.
>> This typically does happen to be the case, but is not actually enforced
>> (and the PCI msi-map binding even explicitly states support for 0 or 1
>> cells) - as a result we've now ended up with dodgy DTs out in the field
>> which depend on this behaviour to map a 1-cell specifier for a 2-cell
>> provider, despite that being bogus per the bindings themselves.
>>
>> Since there is some potential use[1] in being able to map at least
>> single input IDs to multi-cell output specifiers (and properly support
>> 0-cell outputs as well), add support for properly parsing and using the
>> target nodes' #cells values, albeit with the unfortunate complication of
>> still having to work around expectations of the old behaviour too.
>> -- Robin.
>>
>> Unlike single #{}-cell, it is complex to establish a linear relation
>> between input 'id' and output specifier for multi-cell properties, thus
>> it is always expected that len never going to be > 1.
>>
>> These changes have been tested on QEMU for the arm64 architecture.
>
> So there is no real user for that. That's unconvincing. I would assume
> that at least you have real user where you test it.
>
> If you want to speed up acceptance of your patches, then also I would
> prefer to see at least one more user, beside Qualcomm. IOW, show how you
> solve other people problems, not only yours.
>
> Best regards,
> Krzysztof
>
Hi Krzysztof,
Thank you for the feedback.
The upstream user for the multi-cell iommu-map support is the Lemans
platform's VPU device, which requires iommu-map entries targeting a
2-cell IOMMU node. We are currently working on the glymur series [1]
and once that is finalized we will post the Lemans patches as well.
That said, I think this series can go through independently for the
following reasons:
1. Correctness fix: The iommu-map/msi-map bindings have always
specified that the output cell count is determined by
#iommu-cells/#msi-cells on the target node. The kernel has been
silently ignoring this and assuming 1 cell. This patch makes the
kernel respect the binding specification.
2. Backward compatibility preserved: The of_check_bad_map() workaround
handles existing deployed DTs that target 2-cell IOMMU nodes with
1-cell entries. This series has been tested on the glymur platform
[1], which uses iommu-map with 1-cell specifiers, and the existing
parsing continues to work correctly.
Thanks,
Vijay
[1] https://lore.kernel.org/all/20260515-glymur-v6-5-f6a99cb43a24@oss.qualcomm.com/
More information about the linux-arm-kernel
mailing list