[PATCH 00/11] arm64: dts: renesas: Specify ethernet PHY reset timings

[Marek Vasut]

On 5/22/26 3:18 PM, Geert Uytterhoeven wrote:

Hello Geert,

> On Tue, 5 May 2026 at 05:43, Marek Vasut
> <marek.vasut+renesas at mailbox.org> wrote:
>> This is the same patch for various boards, details are below.
>> The discussion that prompted this patchset is at [0].
> 
> Thanks for your series!
> 
>> The KSZ9031RNX reference manual [1] DS00002096H page 60 FIGURE 7-7:
> 
> DS00002117K page 62 FIGURE 7-5
> 
> (and page 74 on the older document I had ;-)
> 
>> POWER-UP/POWER-DOWN/RESET TIMING Note 2 states, that after the
>> de-assertion of reset, wait a minimum of 100 us before starting
>> programming on the MIIM (MDC/MDIO) interface. Set DT property
>> reset-deassert-us to three times that, 300 us, to provide ample
>> time between reset deassertion and MDIO access.
>>
>> The KSZ9031RNX reference manual [1] DS00002096H page 60 TABLE 7-7:
>> POWER-UP/POWER-DOWN/RESET TIMING PARAMETERS row tSR Stable supply
> 
> page 62 TABLE 7-4
> 
>> voltages to de-assertion of reset is at minimum 10 ms. Set DT
>> property reset-assert-us to 10ms because the KSZ9031RNX RM does
>> not explicitly spell out how long the reset has to be asserted,
>> but this at least covers the worst case scenario.
>>
>> The Gray Hawk patch in this series depends on [2].
>>
>> [0] https://lore.kernel.org/all/CAMuHMdXJvrsXitGagqZJ_STdTTh_s1cBAKf6+esihaVWjfn40g@mail.gmail.com/
>> [1] https://ww1.microchip.com/downloads/aemDocuments/documents/UNG/ProductDocuments/DataSheets/KSZ9031MNX-Data-Sheet-DS00002096.pdf
> 
> This link leads to the KSZ9031MNX part. Correct link is:
> 
> https://ww1.microchip.com/downloads/aemDocuments/documents/UNG/ProductDocuments/DataSheets/KSZ9031RNX-Data-Sheet-DS00002117.pdf
> 
>> [2] https://lore.kernel.org/all/20260504225428.114959-1-marek.vasut+renesas@mailbox.org/
> 
> Shall I do the big search-and-replace while applying?
Yes please. Thank you for spotting this.