[PATCH] ARM: rockchip: keep reset control around
Philipp Zabel
p.zabel at pengutronix.de
Fri May 22 01:20:06 PDT 2026
On Fr, 2026-05-22 at 09:20 +0200, Heiko Stuebner wrote:
> Am Donnerstag, 21. Mai 2026, 23:09:15 Mitteleuropäische Sommerzeit schrieb Heiko Stuebner:
> > Do not put the reset control, retain exclusive control over it.
> > After turning on a CPU, the corresponding reset line must stay
> > deasserted.
> >
> > This also avoids calling reset_control_put() before workqueues
> > are operational.
> >
> > Fixes: 78ebbff6d1a0 ("reset: handle removing supplier before consumers")
> > Signed-off-by: Philipp Zabel <p.zabel at pengutronix.de>
> > Tested-by: Steven Price <steven.price at arm.com>
> > Signed-off-by: Heiko Stuebner <heiko at sntech.de>
> > ---
> > arch/arm/mach-rockchip/platsmp.c | 16 ++++++++++------
> > 1 file changed, 10 insertions(+), 6 deletions(-)
> >
> > diff --git a/arch/arm/mach-rockchip/platsmp.c b/arch/arm/mach-rockchip/platsmp.c
> > index f432d22bfed8..f659d894bfae 100644
> > --- a/arch/arm/mach-rockchip/platsmp.c
> > +++ b/arch/arm/mach-rockchip/platsmp.c
> > @@ -34,6 +34,7 @@ static int ncores;
> >
> > static struct regmap *pmu;
> > static int has_pmu = true;
> > +static struct reset_control *cpu_rstc[4];
>
> After sleeping on that, this should be cpu_rstc[5];
>
> Coretx-A9 SoCs need to enable the SCU power-domain which thankfully
> sits at index 4 of the power-domain register.
>
> So while we (already) expect no reset control for that, we need at least
> make sure, it's not reading into undefined memory
The access in pmu_set_power_domain() is gated by
(pd < ARRAY_SIZE(cpu_rstc)). And ncores in rockchip_smp_prepare_cpus()
can not be larger than 4.
> and thus need that empty field in the array.
We could drop the ARRAY_SIZE check and add a placeholder to the array,
but it would need to be set to ERR_PTR(-EINVAL). Otherwise we'd have to
replace all the IS_ERR(rstc) checks as well. I think that would be a
good follow-up change.
regards
Philipp
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