[PATCH v4 1/3] PCI: Allow ATS to be always on for CXL.cache capable devices
Bjorn Helgaas
helgaas at kernel.org
Wed May 20 10:47:58 PDT 2026
On Wed, May 20, 2026 at 10:29:19AM -0700, Nicolin Chen wrote:
> On Wed, May 20, 2026 at 11:20:43AM -0300, Jason Gunthorpe wrote:
> > On Tue, May 19, 2026 at 06:04:18PM -0700, Nicolin Chen wrote:
> >
> > > > Yeah, that's fair, so let's rename it to
> > > >
> > > > pci_translated_required()
> > > >
> > > > ie the device requires translated requests to function. This is what
> > > > CXL.cache implies (IIRC I was told the spec specifically says this)
> > > >
> > > > Requiring translated requests implies you have to enable ATS in the
> > > > system.
> > >
> > > Perhaps we could let IOMMU drivers check:
> > > pci_cxl_is_cache_capable() || pci_dev_specific_is_pre_cxl()
> > > directly?
> >
> > I'd rather have a single function.
>
> OK. Can we use pci_ats_required()?
>
> CXL spec explicitly used "ATS" when stating the requirement of
> CXL.cache). And it'd fit into the existing pci_ats_ functions.
OK by me.
You already have a comment in the code about the CXL.cache
requirement; thanks for that.
I don't know enough about CXL to know what's behind the ATS
requirement. It sounds like it's more than a simple performance
optimization. If you happen to know the reason, it might be worth
a short comment about that too.
Please add a one-line comment in the code about why we check
Cache_Capable instead of Cache_Enable, i.e., even if CXL.cache is not
enabled now, it may be enabled later.
Bjorn
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