[PATCH] dt-bindings: arm-smmu: qcom: Constrain clocks for Hawi SoC
Mukesh Ojha
mukesh.ojha at oss.qualcomm.com
Wed May 20 05:37:03 PDT 2026
On Wed, May 20, 2026 at 12:57:13PM +0200, Krzysztof Kozlowski wrote:
> On Wed, May 20, 2026 at 01:04:47PM +0530, Mukesh Ojha wrote:
> > The Hawi SoC has two SMMU instances with different clock requirements.
> > The Adreno GPU SMMU uses the qcom,adreno-smmu fallback and requires a
> > single HLOS vote clock, matching the pattern already established for
> > Glymur and SM8750. The Application Processor SMMU (APSS) uses the
> > qcom,smmu-500 fallback and has no controllable clocks.
> >
> > Add qcom,hawi-smmu-500 to the single-clock constraint block for the
> > Adreno GPU SMMU and to the no-clocks constraint block for the APSS SMMU,
> > following the pattern how it is done for other SoCs.
>
> If you decided to make a competitive simultaneous work, you could at
> least tell me that.
Well, I covered for one SoC, while you covered for others. I am fine with either one getting picked.
>
> Best regards,
> Krzysztof
>
>
--
-Mukesh Ojha
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