[PATCH] dt-bindings: arm-smmu: qcom: Constrain clocks for Hawi SoC

[Mukesh Ojha]

The Hawi SoC has two SMMU instances with different clock requirements.
The Adreno GPU SMMU uses the qcom,adreno-smmu fallback and requires a
single HLOS vote clock, matching the pattern already established for
Glymur and SM8750. The Application Processor SMMU (APSS) uses the
qcom,smmu-500 fallback and has no controllable clocks.

Add qcom,hawi-smmu-500 to the single-clock constraint block for the
Adreno GPU SMMU and to the no-clocks constraint block for the APSS SMMU,
following the pattern how it is done for other SoCs.

Signed-off-by: Mukesh Ojha <mukesh.ojha at oss.qualcomm.com>
---
This patch is on based on  arm/smmu/bindings branch here in
https://git.kernel.org/pub/scm/linux/kernel/git/iommu/linux.git

 Documentation/devicetree/bindings/iommu/arm,smmu.yaml | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
index 25fd3efa2420..e413564ce55d 100644
--- a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
+++ b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
@@ -570,6 +570,7 @@ allOf:
           items:
             - enum:
                 - qcom,glymur-smmu-500
+                - qcom,hawi-smmu-500
                 - qcom,sm8750-smmu-500
             - const: qcom,adreno-smmu
             - const: qcom,smmu-500
@@ -616,6 +617,7 @@ allOf:
             - enum:
                 - qcom,eliza-smmu-500
                 - qcom,glymur-smmu-500
+                - qcom,hawi-smmu-500
                 - qcom,kaanapali-smmu-500
                 - qcom,milos-smmu-500
                 - qcom,qcs615-smmu-500
-- 
2.53.0