[PATCH v3] EDAC/altera: Guard SDRAM irq2 retrieval for Arria10 only

[Borislav Petkov]

On Fri, May 15, 2026 at 06:41:05AM -0500, Dinh Nguyen wrote:
> 
> 
> On 5/15/26 00:04, muhammad.nazim.amirul.nazle.asmade at altera.com wrote:
> > From: Nazim Amirul <muhammad.nazim.amirul.nazle.asmade at altera.com>
> > 
> > Guard the irq2 retrieval with an of_machine_is_compatible() check so
> > that platform_get_irq(pdev, 1) is only called on Arria10 platforms.
> > 
> > Signed-off-by: Nazim Amirul <muhammad.nazim.amirul.nazle.asmade at altera.com>
> > ---
> > v3: Fix commit header formatting to follow EDAC/altera: prefix
> >      convention as per maintainer feedback.
> > v2: Move irq2 = platform_get_irq(pdev, 1) inside the existing
> >      of_machine_is_compatible("altr,socfpga-arria10") block instead of
> >      adding a separate duplicate guard around it.
> > ---
> >   drivers/edac/altera_edac.c | 6 +++---
> >   1 file changed, 3 insertions(+), 3 deletions(-)
> > 
> > diff --git a/drivers/edac/altera_edac.c b/drivers/edac/altera_edac.c
> > index 4edd2088c2db..ee6ced033f2c 100644
> > --- a/drivers/edac/altera_edac.c
> > +++ b/drivers/edac/altera_edac.c
> > @@ -347,9 +347,6 @@ static int altr_sdram_probe(struct platform_device *pdev)
> >   		return irq;
> >   	}
> > -	/* Arria10 has a 2nd IRQ */
> > -	irq2 = platform_get_irq(pdev, 1);
> > -
> >   	layers[0].type = EDAC_MC_LAYER_CHIP_SELECT;
> >   	layers[0].size = 1;
> >   	layers[0].is_virt_csrow = true;
> > @@ -395,6 +392,9 @@ static int altr_sdram_probe(struct platform_device *pdev)
> >   	/* Only the Arria10 has separate IRQs */
> >   	if (of_machine_is_compatible("altr,socfpga-arria10")) {
> > +		/* Arria10 has a 2nd IRQ */
> > +		irq2 = platform_get_irq(pdev, 1);
> > +
> >   		/* Arria10 specific initialization */
> >   		res = a10_init(mc_vbase);
> >   		if (res < 0)
> 
> Acked-by: Dinh Nguyen <dinguyen at kernel.org>

https://sashiko.dev/#/patchset/20260515050444.10380-1-muhammad.nazim.amirul.nazle.asmade%40altera.com

-- 
Regards/Gruss,
    Boris.

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