[PATCH 2/3] usb: dwc3: xilinx: use reset_control_reset() in versal init
Thinh Nguyen
Thinh.Nguyen at synopsys.com
Tue May 19 15:39:25 PDT 2026
On Mon, May 18, 2026, Pandey, Radhey Shyam wrote:
> On 5/14/2026 7:04 AM, Thinh Nguyen wrote:
> > On Mon, May 11, 2026, Radhey Shyam Pandey wrote:
> > > Replace separate reset_control_assert() and reset_control_deassert() calls
> > > with reset_control_reset(), which pulses the reset in one step. Report
> > > failures with dev_err_probe() and a single message. No functional change.
> > >
> >
> > The behavior of reset_control_reset() is a little different. I wouldn't
> > call this "No functional change". However, I assumed this was tested.
> > Please provide a proper reason for this change in the change log.
>
> In the dwc3-xilinx case, reset_control_reset() routes through the
> zynqmp reset driver and invokes PM_RESET_ACTION_PULSE. This triggers
> the Xilinx firmware reset implementation, which performs both assert
> and deassert. Effectively, reset() issues a single SMC call for a
> reset pulse instead of separate assert and deassert calls and moves
> IP out of reset.
>
> Yes this new reset sequence is validated on HW. I will include
> above description and respin v2..
>
Thanks!
Thinh
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