[PATCH 2/5] dt-bindings: connector: Add fsl,io-connector binding
Krzysztof Kozlowski
krzk at kernel.org
Tue May 19 01:29:50 PDT 2026
On Tue, May 19, 2026 at 02:56:24AM +0000, Chancel Liu wrote:
> > >>> +description:
> > >>> + The NXP I/O connector represents a physically present I/O
> > >>> +connector on the
> > >>> + base board. It acts as a nexus that exposes a constrained set of
> > >>> +I/O
> > >>> + resources, such as GPIOs, clocks, PWMs and interrupts, through
> > >>> +fixed
> > >>> + electrical wiring. All actual hardware providers reside on the base
> > board.
> > >>> + The connector node only defines index-based mappings to those
> > >> providers.
> > >>> +
> > >>> +properties:
> > >>> + compatible:
> > >>> + const: fsl,io-connector
> > >>
> > >> Everything is IO. Everything is connector, so your compatible does
> > >> not match requirements from writing bindings.
> > >>
> > >
> > > Yes, this compatible is too generic. I will rename the compatible to
> > > fsl,aud-io-connector.
> >
> > aud is not much better. Which boards have it? What's the pinout? What's
> > standard? Is it described anywhere? If so, provide reference to spec/docs.
> >
>
> This is not an industry standard electrical interface. This connector
Then if you do not have standard, then you have board specific layouts
thus you need board-specific compatibles. You can use fallbacks. Generic
fallback could work, but both io-connector and aud-io-connector are just
too generic. Every connector is "connector" and "io", thus absolutely
anything can be "io-connector". "aud" improves it only a bit, thus
honestly I would go with board specific fallback as well.
> is present on i.MX95-19x19-EVK and i.MX952-EVK. For example, the
> "i.MX 95 19mm x 19mm Evaluation Kit" homepage[1] publicly documents an
> audio board connection through which IMX-AUD-IO card is connected. The
> detailed user manual (UM12022) is listed as official documentation[2],
> but it is behind an NXP login, so it is not suitable as a public
> reference for upstream. Therefore I list it here to illustrate it's
> mechanism:
>
> +-----------------------------+
> | Base Board |
> | +-----+ +---------+ | +---------+
> | | SPI +------+ | | | |
> | +-----+ | | | GPIO MAP | |
> | | +--|-----------+ |
> | +-----+ | | | | |
> | | I2C +------+ | | | |
> | +-----+ | | | CLOCK MAP | AUD-IO |
> | |connector+--|-----------+ CARD |
> | +-----+ | | | | |
> | | I2S +------+ | | | |
> | +-----+ | | | | |
> | | | | INT MAP | |
> | +-----+ | +--|-----------+ |
> | | I/O +------+ | | | |
> | +-----+ +---------+ | +---------+
> +-----------------------------+
>
> [1]https://www.nxp.com/design/design-center/development-boards-and-designs/IMX95LPD5EVK-19
> [2]https://docs.nxp.com/bundle/UM12022/page/topics/pcie_interface1.html
Best regards,
Krzysztof
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