[PATCH v4 2/2] ARM: dts: aspeed: ventura2: Add Meta ventura2 BMC
Kyle Hsieh
kylehsieh1995 at gmail.com
Mon May 18 19:38:17 PDT 2026
On Mon, May 18, 2026 at 3:18 PM Andrew Jeffery
<andrew at codeconstruct.com.au> wrote:
>
> Hi Kyle,
>
> Firstly, are you trying to represent multiple revisions of the hardware
> design in this devicetree? I'm curious due to the 'legacy' labels
> below.
>
In the previous Ventura hardware generation, these pins were
implemented as a set of direct, native physical GPIO signals. In the V2
design, we introduced alternative interfaces and routed these paths
through the CPLD to convert them into GPIOs before reaching the
BMC.
We chose to retain the 'legacy' prefix to maintain backward
compatibility with our existing userspace software stack and scripts
that transitioned from the previous Ventura platform. Altering these
labels now would break compatibility with applications that rely on
these specific naming conventions. I will add comments in the DTS to
clarify this context.
> On Fri, 2026-04-24 at 17:30 +0800, Kyle Hsieh wrote:
> > Add linux device tree entry related to the Meta(Facebook) rmc-node.
> > The system use an AT2600 BMC.
> > This node is named "ventura2".
> >
> > Signed-off-by: Kyle Hsieh <kylehsieh1995 at gmail.com>
> > ---
> > arch/arm/boot/dts/aspeed/Makefile | 1 +
> > .../dts/aspeed/aspeed-bmc-facebook-ventura2.dts | 2925 ++++++++++++++++++++
> > 2 files changed, 2926 insertions(+)
> >
> > diff --git a/arch/arm/boot/dts/aspeed/Makefile b/arch/arm/boot/dts/aspeed/Makefile
> > index 9adf9278dc94..6b96997629d4 100644
> > --- a/arch/arm/boot/dts/aspeed/Makefile
> > +++ b/arch/arm/boot/dts/aspeed/Makefile
> > @@ -32,6 +32,7 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
> > aspeed-bmc-facebook-minipack.dtb \
> > aspeed-bmc-facebook-santabarbara.dtb \
> > aspeed-bmc-facebook-tiogapass.dtb \
> > + aspeed-bmc-facebook-ventura2.dtb \
> > aspeed-bmc-facebook-wedge40.dtb \
> > aspeed-bmc-facebook-wedge100.dtb \
> > aspeed-bmc-facebook-wedge400-data64.dtb \
> > diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-ventura2.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-ventura2.dts
> > new file mode 100644
> > index 000000000000..8d4ddb473862
> > --- /dev/null
> > +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-ventura2.dts
> > @@ -0,0 +1,2925 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +// Copyright (c) 2023 Facebook Inc.
> > +/dts-v1/;
> > +
> > +#include "aspeed-g6.dtsi"
> > +#include <dt-bindings/i2c/i2c.h>
> > +#include <dt-bindings/gpio/aspeed-gpio.h>
> > +
> > +/ {
> > + model = "Facebook Ventura2 RMC";
> > + compatible = "facebook,ventura2-rmc", "aspeed,ast2600";
> > + aliases {
> > + serial2 = &uart3;
> > + serial4 = &uart5;
> > +
> > + /*
> > + * i2c switch 0-0077, pca9548, 8 child channels assigned
> > + * with bus number 16-23.
> > + */
> > + i2c16 = &i2c0mux0ch0;
> > + i2c17 = &i2c0mux0ch1;
> > + i2c18 = &i2c0mux0ch2;
> > + i2c19 = &i2c0mux0ch3;
> > + i2c20 = &i2c0mux0ch4;
> > + i2c21 = &i2c0mux0ch5;
> > + i2c22 = &i2c0mux0ch6;
> > + i2c23 = &i2c0mux0ch7;
> > +
> > + /*
> > + * i2c switch 1-0077, pca9548, 8 child channels assigned
> > + * with bus number 24-31.
> > + */
> > + i2c24 = &i2c1mux0ch0;
> > + i2c25 = &i2c1mux0ch1;
> > + i2c26 = &i2c1mux0ch2;
> > + i2c27 = &i2c1mux0ch3;
> > + i2c28 = &i2c1mux0ch4;
> > + i2c29 = &i2c1mux0ch5;
> > + i2c30 = &i2c1mux0ch6;
> > + i2c31 = &i2c1mux0ch7;
> > +
> > + /*
> > + * i2c switch 4-0077, pca9548, 8 child channels assigned
> > + * with bus number 32-39.
> > + */
> > + i2c32 = &i2c4mux0ch0;
> > + i2c33 = &i2c4mux0ch1;
> > + i2c34 = &i2c4mux0ch2;
> > + i2c35 = &i2c4mux0ch3;
> > + i2c36 = &i2c4mux0ch4;
> > + i2c37 = &i2c4mux0ch5;
> > + i2c38 = &i2c4mux0ch6;
> > + i2c39 = &i2c4mux0ch7;
> > +
> > + /*
> > + * i2c switch 5-0077, pca9548, 8 child channels assigned
> > + * with bus number 40-47.
> > + */
> > + i2c40 = &i2c5mux0ch0;
> > + i2c41 = &i2c5mux0ch1;
> > + i2c42 = &i2c5mux0ch2;
> > + i2c43 = &i2c5mux0ch3;
> > + i2c44 = &i2c5mux0ch4;
> > + i2c45 = &i2c5mux0ch5;
> > + i2c46 = &i2c5mux0ch6;
> > + i2c47 = &i2c5mux0ch7;
> > +
> > + /*
> > + * i2c switch 8-0077, pca9548, 8 child channels assigned
> > + * with bus number 48-55.
> > + */
> > + i2c48 = &i2c8mux0ch0;
> > + i2c49 = &i2c8mux0ch1;
> > + i2c50 = &i2c8mux0ch2;
> > + i2c51 = &i2c8mux0ch3;
> > + i2c52 = &i2c8mux0ch4;
> > + i2c53 = &i2c8mux0ch5;
> > + i2c54 = &i2c8mux0ch6;
> > + i2c55 = &i2c8mux0ch7;
> > +
> > + /*
> > + * i2c switch 11-0077, pca9548, 8 child channels assigned
> > + * with bus number 56-63.
> > + */
> > + i2c56 = &i2c11mux0ch0;
> > + i2c57 = &i2c11mux0ch1;
> > + i2c58 = &i2c11mux0ch2;
> > + i2c59 = &i2c11mux0ch3;
> > + i2c60 = &i2c11mux0ch4;
> > + i2c61 = &i2c11mux0ch5;
> > + i2c62 = &i2c11mux0ch6;
> > + i2c63 = &i2c11mux0ch7;
> > +
> > + /*
> > + * i2c switch 13-0077, pca9548, 8 child channels assigned
> > + * with bus number 64-71.
> > + */
> > + i2c64 = &i2c13mux0ch0;
> > + i2c65 = &i2c13mux0ch1;
> > + i2c66 = &i2c13mux0ch2;
> > + i2c67 = &i2c13mux0ch3;
> > + i2c68 = &i2c13mux0ch4;
> > + i2c69 = &i2c13mux0ch5;
> > + i2c70 = &i2c13mux0ch6;
> > + i2c71 = &i2c13mux0ch7;
> > +
> > + /*
> > + * i2c switch 15-0077, pca9548, 8 child channels assigned
> > + * with bus number 72-79.
> > + */
> > + i2c72 = &i2c15mux0ch0;
> > + i2c73 = &i2c15mux0ch1;
> > + i2c74 = &i2c15mux0ch2;
> > + i2c75 = &i2c15mux0ch3;
> > + i2c76 = &i2c15mux0ch4;
> > + i2c77 = &i2c15mux0ch5;
> > + i2c78 = &i2c15mux0ch6;
> > + i2c79 = &i2c15mux0ch7;
>
> Can you please add comments justifying why all of these aliases are
> necessary given a number of them are for busses with no devices
> described under them?
These I2C aliases are pre-allocated because these empty channels are
strictly reserved for future hardware feature expansions, which will
interface with add-on boards. I will add clear comments in the code to
justify their necessity in the next patch.
>
> > + };
> > +
> > + chosen {
> > + stdout-path = "serial4:57600n8";
> > + };
> > +
> > + fan_leds {
> > + compatible = "gpio-leds";
> > +
> > + led-0 {
> > + label = "fcb0fan0_ledd1_blue";
>
> Given the labels are exposed to userspace and is something applications
> likely consume, is the double 'd' in led intentional?
Yes, the double 'd' in "ledd1" is intentional. It aligns with our hardware
schematic design naming convention, where these specific onboard
indicators are designated as LEDD1, LEDD2, etc.
>
> > + default-state = "off";
> > + gpios = <&fan_io_expander0 0 GPIO_ACTIVE_LOW>;
> > + };
> > +
> > + led-1 {
> > + label = "fcb0fan1_ledd2_blue";
> > + default-state = "off";
> > + gpios = <&fan_io_expander0 1 GPIO_ACTIVE_LOW>;
> > + };
> > +
> > + led-2 {
> > + label = "fcb0fan2_ledd3_blue";
> > + default-state = "off";
> > + gpios = <&fan_io_expander1 0 GPIO_ACTIVE_LOW>;
> > + };
> > +
> > + led-3 {
> > + label = "fcb0fan3_ledd4_blue";
> > + default-state = "off";
> > + gpios = <&fan_io_expander1 1 GPIO_ACTIVE_LOW>;
> > + };
> > +
> > + led-4 {
> > + label = "fcb0fan0_ledd1_amber";
> > + default-state = "off";
> > + gpios = <&fan_io_expander0 4 GPIO_ACTIVE_LOW>;
> > + };
> > +
> > + led-5 {
> > + label = "fcb0fan1_ledd2_amber";
> > + default-state = "off";
> > + gpios = <&fan_io_expander0 5 GPIO_ACTIVE_LOW>;
> > + };
> > +
> > + led-6 {
> > + label = "fcb0fan2_ledd3_amber";
> > + default-state = "off";
> > + gpios = <&fan_io_expander1 4 GPIO_ACTIVE_LOW>;
> > + };
> > +
> > + led-7 {
> > + label = "fcb0fan3_ledd4_amber";
> > + default-state = "off";
> > + gpios = <&fan_io_expander1 5 GPIO_ACTIVE_LOW>;
> > + };
> > + };
> > +
>
> ...
>
> > +
> > +&fmc {
> > + status = "okay";
> > + flash at 0 {
> > + status = "okay";
> > + m25p,fast-read;
> > + label = "bmc";
> > + spi-max-frequency = <50000000>;
> > + #include "openbmc-flash-layout-128.dtsi"
> > + };
> > + flash at 1 {
> > + status = "okay";
> > + m25p,fast-read;
> > + label = "alt-bmc";
> > + spi-max-frequency = <50000000>;
>
> Perhaps include the alternate flash layout dtsi here?
The `flash at 1` (`alt-bmc`) node is intentionally left unpartitioned
without the layout DTSI.
In our dual-flash design, `flash at 1` serves as the secondary/backup
flash chip. Keeping it without sub-partitions allows the kernel and
userspace tools to treat this flash as a single, contiguous raw MTD
device. This is required by our firmware update mechanism, which
flashes a single, full-size composite image directly to the entire
backup flash.
This structure follows the existing upstream pattern established in
`aspeed-bmc-facebook-yosemite5.dts`.
>
> > + };
> > +};
> > +
> > +&peci0 {
>
> Can you please order the nodes alphabetically. P is not between F and
> G.
I will ensure all nodes are strictly sorted in alphabetical order in
the next version.
>
> > + status = "okay";
> > +};
> > +
> >
>
> ...
>
> > +
> > +&i2c10 {
> > + status = "okay";
> > +
> > + legacy_prsnt_io_expander0: gpio at 11 {
>
> Why 'legacy'?
>
> > + compatible = "nxp,pca9555";
> > + reg = <0x11>;
> > + gpio-controller;
> > + #gpio-cells = <2>;
> > + interrupt-parent = <&sgpiom0>;
> > + interrupts = <40 IRQ_TYPE_LEVEL_LOW>;
> > +
> > + gpio-line-names =
> > + "TRAY_PRSNT1_N_BUF_R", "TRAY_PRSNT2_N_BUF_R",
> > + "TRAY_PRSNT3_N_BUF_R", "TRAY_PRSNT4_N_BUF_R",
> > + "TRAY_PRSNT5_N_BUF_R", "TRAY_PRSNT6_N_BUF_R",
> > + "TRAY_PRSNT7_N_BUF_R", "TRAY_PRSNT8_N_BUF_R",
> > + "TRAY_PRSNT9_N_BUF_R", "TRAY_PRSNT10_N_BUF_R",
> > + "TRAY_PRSNT11_N_BUF_R", "TRAY_PRSNT12_N_BUF_R",
> > + "TRAY_PRSNT13_N_BUF_R", "TRAY_PRSNT14_N_BUF_R",
> > + "TRAY_PRSNT15_N_BUF_R", "TRAY_PRSNT16_N_BUF_R";
> > + };
> > +
> > + legacy_prsnt_io_expander1: gpio at 12 {
> > + compatible = "nxp,pca9555";
> > + reg = <0x12>;
> > + gpio-controller;
> > + #gpio-cells = <2>;
> > + interrupt-parent = <&sgpiom0>;
> > + interrupts = <40 IRQ_TYPE_LEVEL_LOW>;
> > +
> > + gpio-line-names =
> > + "TRAY_PRSNT17_N_BUF_R", "TRAY_PRSNT18_N_BUF_R",
> > + "TRAY_PRSNT19_N_BUF_R", "TRAY_PRSNT20_N_BUF_R",
> > + "TRAY_PRSNT21_N_BUF_R", "TRAY_PRSNT22_N_BUF_R",
> > + "TRAY_PRSNT23_N_BUF_R", "TRAY_PRSNT24_N_BUF_R",
> > + "TRAY_PRSNT25_N_BUF_R", "TRAY_PRSNT26_N_BUF_R",
> > + "TRAY_PRSNT27_N_BUF_R", "TRAY_PRSNT28_N_BUF_R",
> > + "TRAY_PRSNT29_N_BUF_R", "TRAY_PRSNT30_N_BUF_R",
> > + "TRAY_PRSNT31_N_BUF_R", "TRAY_PRSNT32_N_BUF_R";
> > + };
> > +
> > + legacy_prsnt_io_expander2: gpio at 13 {
> > + compatible = "nxp,pca9555";
> > + reg = <0x13>;
> > + gpio-controller;
> > + #gpio-cells = <2>;
> > + interrupt-parent = <&sgpiom0>;
> > + interrupts = <40 IRQ_TYPE_LEVEL_LOW>;
> > +
> > + gpio-line-names =
> > + "TRAY_PRSNT33_N_BUF_R", "TRAY_PRSNT34_N_BUF_R",
> > + "TRAY_PRSNT35_N_BUF_R", "TRAY_PRSNT36_N_BUF_R",
> > + "TRAY_PRSNT37_N_BUF_R", "TRAY_PRSNT38_N_BUF_R",
> > + "TRAY_PRSNT39_N_BUF_R", "TRAY_PRSNT40_N_BUF_R",
> > + "", "",
> > + "", "",
> > + "", "",
> > + "", "";
> > + };
> > +
> > + power-monitor at 14 {
> > + compatible = "infineon,xdp710";
> > + reg = <0x14>;
> > + };
> > +
> > + legacy_pwrgd_io_expander1: gpio at 15 {
> > + compatible = "nxp,pca9555";
> > + reg = <0x15>;
> > + gpio-controller;
> > + #gpio-cells = <2>;
> > + interrupt-parent = <&sgpiom0>;
> > + interrupts = <42 IRQ_TYPE_LEVEL_LOW>;
> > +
> > + gpio-line-names =
> > + "TRAY_PWRGD17_N_BUF_R", "TRAY_PWRGD18_N_BUF_R",
> > + "TRAY_PWRGD19_N_BUF_R", "TRAY_PWRGD20_N_BUF_R",
> > + "TRAY_PWRGD21_N_BUF_R", "TRAY_PWRGD22_N_BUF_R",
> > + "TRAY_PWRGD23_N_BUF_R", "TRAY_PWRGD24_N_BUF_R",
> > + "TRAY_PWRGD25_N_BUF_R", "TRAY_PWRGD26_N_BUF_R",
> > + "TRAY_PWRGD27_N_BUF_R", "TRAY_PWRGD28_N_BUF_R",
> > + "TRAY_PWRGD29_N_BUF_R", "TRAY_PWRGD30_N_BUF_R",
> > + "TRAY_PWRGD31_N_BUF_R", "TRAY_PWRGD32_N_BUF_R";
> > + };
> > +
> > + legacy_pwrgd_io_expander2: gpio at 16 {
> > + compatible = "nxp,pca9555";
> > + reg = <0x16>;
> > + gpio-controller;
> > + #gpio-cells = <2>;
> > + interrupt-parent = <&sgpiom0>;
> > + interrupts = <42 IRQ_TYPE_LEVEL_LOW>;
> > +
> > + gpio-line-names =
> > + "TRAY_PWRGD33_N_BUF_R", "TRAY_PWRGD34_N_BUF_R",
> > + "TRAY_PWRGD35_N_BUF_R", "TRAY_PWRGD36_N_BUF_R",
> > + "TRAY_PWRGD37_N_BUF_R", "TRAY_PWRGD38_N_BUF_R",
> > + "TRAY_PWRGD39_N_BUF_R", "TRAY_PWRGD40_N_BUF_R",
> > + "", "",
> > + "", "",
> > + "", "",
> > + "", "";
> > + };
> > +
> > + legacy_leak_io_expander0: gpio at 17 {
> > + compatible = "nxp,pca9555";
> > + reg = <0x17>;
> > + gpio-controller;
> > + #gpio-cells = <2>;
> > + interrupt-parent = <&sgpiom0>;
> > + interrupts = <46 IRQ_TYPE_LEVEL_LOW>;
> > +
> > + gpio-line-names =
> > + "TRAY_LEAK_DETECT1_N_BUF_R", "TRAY_LEAK_DETECT2_N_BUF_R",
> > + "TRAY_LEAK_DETECT3_N_BUF_R", "TRAY_LEAK_DETECT4_N_BUF_R",
> > + "TRAY_LEAK_DETECT5_N_BUF_R", "TRAY_LEAK_DETECT6_N_BUF_R",
> > + "TRAY_LEAK_DETECT7_N_BUF_R", "TRAY_LEAK_DETECT8_N_BUF_R",
> > + "TRAY_LEAK_DETECT9_N_BUF_R", "TRAY_LEAK_DETECT10_N_BUF_R",
> > + "TRAY_LEAK_DETECT11_N_BUF_R", "TRAY_LEAK_DETECT12_N_BUF_R",
> > + "TRAY_LEAK_DETECT13_N_BUF_R", "TRAY_LEAK_DETECT14_N_BUF_R",
> > + "TRAY_LEAK_DETECT15_N_BUF_R", "TRAY_LEAK_DETECT16_N_BUF_R";
> > + };
> > +
> > + legacy_leak_io_expander1: gpio at 18 {
> > + compatible = "nxp,pca9555";
> > + reg = <0x18>;
> > + gpio-controller;
> > + #gpio-cells = <2>;
> > + interrupt-parent = <&sgpiom0>;
> > + interrupts = <46 IRQ_TYPE_LEVEL_LOW>;
> > +
> > + gpio-line-names =
> > + "TRAY_LEAK_DETECT17_N_BUF_R", "TRAY_LEAK_DETECT18_N_BUF_R",
> > + "TRAY_LEAK_DETECT19_N_BUF_R", "TRAY_LEAK_DETECT20_N_BUF_R",
> > + "TRAY_LEAK_DETECT21_N_BUF_R", "TRAY_LEAK_DETECT22_N_BUF_R",
> > + "TRAY_LEAK_DETECT23_N_BUF_R", "TRAY_LEAK_DETECT24_N_BUF_R",
> > + "TRAY_LEAK_DETECT25_N_BUF_R", "TRAY_LEAK_DETECT26_N_BUF_R",
> > + "TRAY_LEAK_DETECT27_N_BUF_R", "TRAY_LEAK_DETECT28_N_BUF_R",
> > + "TRAY_LEAK_DETECT29_N_BUF_R", "TRAY_LEAK_DETECT30_N_BUF_R",
> > + "TRAY_LEAK_DETECT31_N_BUF_R", "TRAY_LEAK_DETECT32_N_BUF_R";
> > + };
> > +
> > + legacy_leak_io_expander2: gpio at 19 {
> > + compatible = "nxp,pca9555";
> > + reg = <0x19>;
> > + gpio-controller;
> > + #gpio-cells = <2>;
> > + interrupt-parent = <&sgpiom0>;
> > + interrupts = <46 IRQ_TYPE_LEVEL_LOW>;
> > +
> > + gpio-line-names =
> > + "TRAY_LEAK_DETECT33_N_BUF_R", "TRAY_LEAK_DETECT34_N_BUF_R",
> > + "TRAY_LEAK_DETECT35_N_BUF_R", "TRAY_LEAK_DETECT36_N_BUF_R",
> > + "TRAY_LEAK_DETECT37_N_BUF_R", "TRAY_LEAK_DETECT38_N_BUF_R",
> > + "TRAY_LEAK_DETECT39_N_BUF_R", "TRAY_LEAK_DETECT40_N_BUF_R",
> > + "", "",
> > + "", "",
> > + "", "",
> > + "", "";
> > + };
> > +
> > + legacy_small_leak_io_expander0: gpio at 1a {
> > + compatible = "nxp,pca9555";
> > + reg = <0x1a>;
> > + gpio-controller;
> > + #gpio-cells = <2>;
> > + interrupt-parent = <&sgpiom0>;
> > + interrupts = <44 IRQ_TYPE_LEVEL_LOW>;
> > +
> > + gpio-line-names =
> > + "TRAY_SMALL_LEAK1_N_BUF_R", "TRAY_SMALL_LEAK2_N_BUF_R",
> > + "TRAY_SMALL_LEAK3_N_BUF_R", "TRAY_SMALL_LEAK4_N_BUF_R",
> > + "TRAY_SMALL_LEAK5_N_BUF_R", "TRAY_SMALL_LEAK6_N_BUF_R",
> > + "TRAY_SMALL_LEAK7_N_BUF_R", "TRAY_SMALL_LEAK8_N_BUF_R",
> > + "TRAY_SMALL_LEAK9_N_BUF_R", "TRAY_SMALL_LEAK10_N_BUF_R",
> > + "TRAY_SMALL_LEAK11_N_BUF_R", "TRAY_SMALL_LEAK12_N_BUF_R",
> > + "TRAY_SMALL_LEAK13_N_BUF_R", "TRAY_SMALL_LEAK14_N_BUF_R",
> > + "TRAY_SMALL_LEAK15_N_BUF_R", "TRAY_SMALL_LEAK16_N_BUF_R";
> > + };
> > +
> > + legacy_small_leak_io_expander1: gpio at 1b {
> > + compatible = "nxp,pca9555";
> > + reg = <0x1b>;
> > + gpio-controller;
> > + #gpio-cells = <2>;
> > + interrupt-parent = <&sgpiom0>;
> > + interrupts = <44 IRQ_TYPE_LEVEL_LOW>;
> > +
> > + gpio-line-names =
> > + "TRAY_SMALL_LEAK17_N_BUF_R", "TRAY_SMALL_LEAK18_N_BUF_R",
> > + "TRAY_SMALL_LEAK19_N_BUF_R", "TRAY_SMALL_LEAK20_N_BUF_R",
> > + "TRAY_SMALL_LEAK21_N_BUF_R", "TRAY_SMALL_LEAK22_N_BUF_R",
> > + "TRAY_SMALL_LEAK23_N_BUF_R", "TRAY_SMALL_LEAK24_N_BUF_R",
> > + "TRAY_SMALL_LEAK25_N_BUF_R", "TRAY_SMALL_LEAK26_N_BUF_R",
> > + "TRAY_SMALL_LEAK27_N_BUF_R", "TRAY_SMALL_LEAK28_N_BUF_R",
> > + "TRAY_SMALL_LEAK29_N_BUF_R", "TRAY_SMALL_LEAK30_N_BUF_R",
> > + "TRAY_SMALL_LEAK31_N_BUF_R", "TRAY_SMALL_LEAK32_N_BUF_R";
> > + };
> > +
> > + legacy_small_leak_io_expander2: gpio at 1c {
> > + compatible = "nxp,pca9555";
> > + reg = <0x1c>;
> > + gpio-controller;
> > + #gpio-cells = <2>;
> > + interrupt-parent = <&sgpiom0>;
> > + interrupts = <44 IRQ_TYPE_LEVEL_LOW>;
> > +
> > + gpio-line-names =
> > + "TRAY_SMALL_LEAK33_N_BUF_R", "TRAY_SMALL_LEAK34_N_BUF_R",
> > + "TRAY_SMALL_LEAK35_N_BUF_R", "TRAY_SMALL_LEAK36_N_BUF_R",
> > + "TRAY_SMALL_LEAK37_N_BUF_R", "TRAY_SMALL_LEAK38_N_BUF_R",
> > + "TRAY_SMALL_LEAK39_N_BUF_R", "TRAY_SMALL_LEAK40_N_BUF_R",
> > + "", "",
> > + "", "",
> > + "", "",
> > + "", "";
> > + };
> > +
> > + legacy_pwrgd_io_expander0: gpio at 28 {
> > + compatible = "nxp,pca9555";
> > + reg = <0x28>;
> > + gpio-controller;
> > + #gpio-cells = <2>;
> > + interrupt-parent = <&sgpiom0>;
> > + interrupts = <42 IRQ_TYPE_LEVEL_LOW>;
> > +
> > + gpio-line-names =
> > + "TRAY_PWRGD1_N_BUF_R", "TRAY_PWRGD2_N_BUF_R",
> > + "TRAY_PWRGD3_N_BUF_R", "TRAY_PWRGD4_N_BUF_R",
> > + "TRAY_PWRGD5_N_BUF_R", "TRAY_PWRGD6_N_BUF_R",
> > + "TRAY_PWRGD7_N_BUF_R", "TRAY_PWRGD8_N_BUF_R",
> > + "TRAY_PWRGD9_N_BUF_R", "TRAY_PWRGD10_N_BUF_R",
> > + "TRAY_PWRGD11_N_BUF_R", "TRAY_PWRGD12_N_BUF_R",
> > + "TRAY_PWRGD13_N_BUF_R", "TRAY_PWRGD14_N_BUF_R",
> > + "TRAY_PWRGD15_N_BUF_R", "TRAY_PWRGD16_N_BUF_R";
> > + };
> > +
>
> ...
>
> > +
> > +&mdio0 {
> > + status = "okay";
> > +};
> > +
> > +&peci0 {
> > + status = "okay";
> > +};
>
> Ah, so the earlier peci node is redundant. Can you please remove it?
Got it. I will remove the redundant peci0 node and ensure all nodes
are strictly sorted in alphabetical order in the next version.
>
> Andrew
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