[PATCH v4 2/6] dt-bindings: display/msm: gpu: Document Adreno X2-185
Akhil P Oommen
akhilpo at oss.qualcomm.com
Fri May 15 15:15:55 PDT 2026
On 5/14/2026 3:43 PM, Krzysztof Kozlowski wrote:
> On Wed, May 13, 2026 at 12:51:19AM +0530, Akhil P Oommen wrote:
>> Adreno X2-185 GPU found in Glymur chipsets belongs to the A8x family.
>> It features a new slice architecture with 4 slices, significantly higher
>> bandwidth throughput compared to mobile counterparts, raytracing support,
>> and the highest GPU Fmax seen so far on an Adreno GPU (1850 Mhz), among
>> other improvements. Update the dt bindings documentation to describe this
>> GPU.
>>
>> Signed-off-by: Akhil P Oommen <akhilpo at oss.qualcomm.com>
>> ---
>> Documentation/devicetree/bindings/display/msm/gpu.yaml | 17 +++++++++++++++++
>> 1 file changed, 17 insertions(+)
>
> Someone needs to start applying Adreno GPU patches...
> https://lore.kernel.org/all/20260301142033.88851-2-krzysztof.kozlowski@oss.qualcomm.com/
>
>
>>
>> diff --git a/Documentation/devicetree/bindings/display/msm/gpu.yaml b/Documentation/devicetree/bindings/display/msm/gpu.yaml
>> index 04b2328903ca..e67cd708dda2 100644
>> --- a/Documentation/devicetree/bindings/display/msm/gpu.yaml
>> +++ b/Documentation/devicetree/bindings/display/msm/gpu.yaml
>> @@ -411,6 +411,22 @@ allOf:
>> - clocks
>> - clock-names
>>
>> + - if:
>> + properties:
>> + compatible:
>> + contains:
>> + const: qcom,adreno-44070001
>> + then:
>> + properties:
>> + reg:
>> + minItems: 2
>> + maxItems: 2
>> +
>> + reg-names:
>> + items:
>> + - const: kgsl_3d0_reg_memory
>> + - const: cx_mem
>
> Are you sure there is no cx_dbgc? If not, then just minItems+maxItems
> like for 'reg:'.
I merged cx_dbgc region into the kgsl_3d0_reg_memory region for A8xx
series. It was getting in the way of covering the entire GPU MMIO in DT
without overlaps.
We don't prefer overlapping regions even if it is within a single
device, right?
-Akhil.
>
> Best regards,
> Krzysztof
>
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