[PATCH 3/8] arm64: dts: qcom: kaanapali: add the GPU SMMU node
Dmitry Baryshkov
dmitry.baryshkov at oss.qualcomm.com
Wed May 13 09:51:38 PDT 2026
On Tue, May 12, 2026 at 03:53:17AM +0530, Akhil P Oommen wrote:
> From: Qingqing Zhou <quic_qqzhou at quicinc.com>
>
> Add the Adreno GPU SMMU node for kaanapali platform.
>
> Signed-off-by: Qingqing Zhou <quic_qqzhou at quicinc.com>
> Signed-off-by: Akhil P Oommen <akhilpo at oss.qualcomm.com>
> ---
> arch/arm64/boot/dts/qcom/kaanapali.dtsi | 41 +++++++++++++++++++++++++++++++++
> 1 file changed, 41 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/kaanapali.dtsi b/arch/arm64/boot/dts/qcom/kaanapali.dtsi
> index bab654bbd6d0..26a4de9c8d45 100644
> --- a/arch/arm64/boot/dts/qcom/kaanapali.dtsi
> +++ b/arch/arm64/boot/dts/qcom/kaanapali.dtsi
> @@ -2597,6 +2597,47 @@ gpucc: clock-controller at 3d90000 {
> #power-domain-cells = <1>;
> };
>
> + adreno_smmu: iommu at 3da0000 {
> + compatible = "qcom,kaanapali-smmu-500", "qcom,adreno-smmu",
> + "qcom,smmu-500", "arm,mmu-500";
> + reg = <0x0 0x3da0000 0x0 0x40000>;
> + #iommu-cells = <2>;
> + #global-interrupts = <1>;
> + dma-coherent;
> +
> + power-domains = <&gpucc GPU_CC_CX_GDSC>;
> +
> + clocks = <&gpucc GPU_CC_GPU_SMMU_VOTE_CLK>;
> + clock-names = "hlos";
> +
> + interrupts = <GIC_SPI 674 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 678 IRQ_TYPE_LEVEL_HIGH>,
Please align on '<' symbol
> + <GIC_SPI 679 IRQ_TYPE_LEVEL_HIGH>,
--
With best wishes
Dmitry
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