[PATCH v1] arm: dts: imx: Add watchdog support for early boot stages
alice.guo at oss.nxp.com
alice.guo at oss.nxp.com
Mon May 11 19:48:50 PDT 2026
From: Alice Guo <alice.guo at nxp.com>
Add bootph-all property to watchdog nodes to enable them in U-Boot's
early boot phases. This allows U-Boot to utilize these watchdogs for
system monitoring and reset functionality during boot.
The bootph-all property ensures these watchdog devices are available
across all U-Boot boot phases (TPL, SPL, and U-Boot proper).
Signed-off-by: Alice Guo <alice.guo at nxp.com>
---
arch/arm/boot/dts/nxp/imx/imx7ulp.dtsi | 11 +++++++++++
arch/arm64/boot/dts/freescale/imx8ulp.dtsi | 1 +
arch/arm64/boot/dts/freescale/imx91_93_common.dtsi | 3 +++
arch/arm64/boot/dts/freescale/imx94.dtsi | 12 ++++++++++++
arch/arm64/boot/dts/freescale/imx95.dtsi | 11 +++++++++++
arch/arm64/boot/dts/freescale/imx952.dtsi | 11 +++++++++++
6 files changed, 49 insertions(+)
diff --git a/arch/arm/boot/dts/nxp/imx/imx7ulp.dtsi b/arch/arm/boot/dts/nxp/imx/imx7ulp.dtsi
index 1355feda1aa7..c29a767df925 100644
--- a/arch/arm/boot/dts/nxp/imx/imx7ulp.dtsi
+++ b/arch/arm/boot/dts/nxp/imx/imx7ulp.dtsi
@@ -325,6 +325,17 @@ smc1: clock-controller at 40410000 {
clock-names = "divcore", "hsrun_divcore";
};
+ wdog2: watchdog at 40430000 {
+ compatible = "fsl,imx7ulp-wdt";
+ reg = <0x40430000 0x10000>;
+ interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&pcc2 IMX7ULP_CLK_WDG2>;
+ assigned-clocks = <&pcc2 IMX7ULP_CLK_WDG2>;
+ assigned-clock-parents = <&scg1 IMX7ULP_CLK_FIRC_BUS_CLK>;
+ timeout-sec = <40>;
+ status = "disabled";
+ };
+
pcc3: clock-controller at 40b30000 {
compatible = "fsl,imx7ulp-pcc3";
reg = <0x40b30000 0x10000>;
diff --git a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
index 1de3ad60c6aa..df06f03624d6 100644
--- a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
@@ -302,6 +302,7 @@ wdog3: watchdog at 292a0000 {
assigned-clocks = <&pcc3 IMX8ULP_CLK_WDOG3>;
assigned-clock-parents = <&cgc1 IMX8ULP_CLK_SOSC_DIV2>;
timeout-sec = <40>;
+ bootph-all;
};
cgc1: clock-controller at 292c0000 {
diff --git a/arch/arm64/boot/dts/freescale/imx91_93_common.dtsi b/arch/arm64/boot/dts/freescale/imx91_93_common.dtsi
index 46a5d2df074d..a1a7e6a0571b 100644
--- a/arch/arm64/boot/dts/freescale/imx91_93_common.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx91_93_common.dtsi
@@ -525,6 +525,7 @@ wdog3: watchdog at 42490000 {
clocks = <&clk IMX93_CLK_WDOG3_GATE>;
timeout-sec = <40>;
status = "disabled";
+ bootph-all;
};
wdog4: watchdog at 424a0000 {
@@ -534,6 +535,7 @@ wdog4: watchdog at 424a0000 {
clocks = <&clk IMX93_CLK_WDOG4_GATE>;
timeout-sec = <40>;
status = "disabled";
+ bootph-all;
};
wdog5: watchdog at 424b0000 {
@@ -543,6 +545,7 @@ wdog5: watchdog at 424b0000 {
clocks = <&clk IMX93_CLK_WDOG5_GATE>;
timeout-sec = <40>;
status = "disabled";
+ bootph-all;
};
tpm3: pwm at 424e0000 {
diff --git a/arch/arm64/boot/dts/freescale/imx94.dtsi b/arch/arm64/boot/dts/freescale/imx94.dtsi
index c460ece6070f..9420519b5be1 100644
--- a/arch/arm64/boot/dts/freescale/imx94.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx94.dtsi
@@ -1283,6 +1283,18 @@ wdog3: watchdog at 49220000 {
timeout-sec = <40>;
fsl,ext-reset-output;
status = "disabled";
+ bootph-all;
+ };
+
+ wdog4: watchdog at 49230000 {
+ compatible = "fsl,imx94-wdt", "fsl,imx93-wdt";
+ reg = <0x49230000 0x10000>;
+ interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&scmi_clk IMX94_CLK_BUSWAKEUP>;
+ timeout-sec = <40>;
+ fsl,ext-reset-output;
+ status = "disabled";
+ bootph-all;
};
};
diff --git a/arch/arm64/boot/dts/freescale/imx95.dtsi b/arch/arm64/boot/dts/freescale/imx95.dtsi
index 71394871d8dd..7caacdc819c4 100644
--- a/arch/arm64/boot/dts/freescale/imx95.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx95.dtsi
@@ -795,6 +795,17 @@ wdog3: watchdog at 42490000 {
clocks = <&scmi_clk IMX95_CLK_BUSWAKEUP>;
timeout-sec = <40>;
status = "disabled";
+ bootph-all;
+ };
+
+ wdog4: watchdog at 424a0000 {
+ compatible = "fsl,imx93-wdt";
+ reg = <0x424a0000 0x10000>;
+ interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&scmi_clk IMX95_CLK_BUSWAKEUP>;
+ timeout-sec = <40>;
+ status = "disabled";
+ bootph-all;
};
tpm3: pwm at 424e0000 {
diff --git a/arch/arm64/boot/dts/freescale/imx952.dtsi b/arch/arm64/boot/dts/freescale/imx952.dtsi
index b30707837f35..59f829004000 100644
--- a/arch/arm64/boot/dts/freescale/imx952.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx952.dtsi
@@ -349,6 +349,17 @@ wdog3: watchdog at 420b0000 {
clocks = <&scmi_clk IMX952_CLK_BUSWAKEUP>;
timeout-sec = <40>;
status = "disabled";
+ bootph-all;
+ };
+
+ wdog4: watchdog at 420c0000 {
+ compatible = "fsl,imx93-wdt";
+ reg = <0x420c0000 0x10000>;
+ interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&scmi_clk IMX952_CLK_BUSWAKEUP>;
+ timeout-sec = <40>;
+ status = "disabled";
+ bootph-all;
};
tpm3: pwm at 42100000 {
--
2.34.1
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