[PATCH net v1 1/2] dt-bindings: ethernet: eswin: refine delay model and HSP register description

[Conor Dooley]

On Fri, May 08, 2026 at 01:43:23PM +0800, 李志 wrote:
> 
> 
> 
> > -----原始邮件-----
> > 发件人: "Conor Dooley" <conor at kernel.org>
> > 发送时间:2026-05-08 01:24:02 (星期五)
> > 收件人: lizhi2 at eswincomputing.com
> > 抄送: andrew+netdev at lunn.ch, davem at davemloft.net, edumazet at google.com, kuba at kernel.org, pabeni at redhat.com, robh at kernel.org, krzk+dt at kernel.org, conor+dt at kernel.org, netdev at vger.kernel.org, devicetree at vger.kernel.org, linux-kernel at vger.kernel.org, mcoquelin.stm32 at gmail.com, alexandre.torgue at foss.st.com, rmk+kernel at armlinux.org.uk, maxime.chevallier at bootlin.com, linux-stm32 at st-md-mailman.stormreply.com, linux-arm-kernel at lists.infradead.org, ningyu at eswincomputing.com, linmin at eswincomputing.com, pinkesh.vaghela at einfochips.com, pritesh.patel at einfochips.com, weishangjuan at eswincomputing.com
> > 主题: Re: [PATCH net v1 1/2] dt-bindings: ethernet: eswin: refine delay model and HSP register description
> > 
> > On Thu, May 07, 2026 at 04:31:36PM +0800, lizhi2 at eswincomputing.com wrote:
> > > From: Zhi Li <lizhi2 at eswincomputing.com>
> > > 
> > > Refine the EIC7700 Ethernet dt-binding based on observed hardware behavior
> > > and clarify the original delay model for eth0.
> > > 
> > > The previous binding used an enum-based definition for
> > > rx-internal-delay-ps and tx-internal-delay-ps. Replace it with a
> > > range-based model using:
> > > 
> > >   - minimum: 0
> > >   - maximum: 2540
> > >   - multipleOf: 20
> > > 
> > > This better reflects the actual hardware implementation, which
> > > supports 20ps granularity delay steps in the MAC RGMII interface.
> > > 
> > > The tx/rx internal delay values are clarified as MAC-side programmable
> > > delay components applied on the RGMII clock/data path, representing
> > > the effective delay seen at the MAC interface.
> > > 
> > > This does not change the intended hardware semantics, but aligns the
> > > binding with the actual hardware implementation.
> > > 
> > > These properties are optional and only required when MAC-side fine
> > > tuning is needed; otherwise delay alignment is provided by PHY or
> > > board design.
> > > 
> > > Depending on the selected RGMII timing mode, delay alignment may be
> > > provided by the PHY (e.g. rgmii-id) or by board/MAC-side configuration.
> > > When PHY or board design already provides the required delay, these
> > > MAC-side properties may be omitted. When MAC-side fine tuning is
> > > required, they should be provided to describe the internal RGMII
> > > timing adjustment.
> > > 
> > > Additionally, extend the description of the HSP subsystem register
> > > layout used by the MAC glue logic. This includes explicit TXD and RXD
> > > delay control registers to ensure deterministic initialization and
> > > to override any residual configuration potentially left by bootloaders.
> > > 
> > > Add reference to the EIC7700X SoC Technical Reference Manual,
> > > Chapter 10 ("High-Speed Interface"), Part 4 for background of the
> > > HSP CSR block:
> > > https://github.com/eswincomputing/EIC7700X-SoC-Technical-Reference-Manual/releases
> > > 
> > > There are no in-tree users of this binding, so no ABI impact is
> > > expected.
> > > 
> > > Fixes: 888bd0eca93c ("dt-bindings: ethernet: eswin: Document for EIC7700 SoC")
> > > Signed-off-by: Zhi Li <lizhi2 at eswincomputing.com>
> > > ---
> > 
> > While this is v1, it's really v8 and there should therefore be a
> > changelog that explains where my ack and the new compatible went.
> > 
> 
> Thanks for the review.
> 
> Based on Jakub's feedback on the previous v7 series, I plan to split the
> changes into two separate series:
> 
> - a smaller fix series intended for net,
> - and a separate eth1 feature series intended for net-next.
> 
> After the split, the scope and target trees of the two series will differ
> from the original combined series, so I plan to restart the revision
> numbering from v1 for both series.
> 
> The additional compatible string and the eth1-specific DT binding
> extensions will be moved into the separate feature series, and I will
> reflect this in the v2 cover letter.
> 
> The DT binding changes in this fix series v1 are simply extracted from the
> previous v7 series as part of the split.
> 
> Since the series has been restructured, I will drop the previous
> Acked-by tags.
> 
> I will also document the reason for doing so and the impact of the split
> in the v2 cover letter.

This isn't what I am looking for. I just want/wanted an explanation for
why the new compatible has been removed from the patch.

> 
> If you think the binding changes are still effectively unchanged and the
> previous Acked-by can still apply, I am happy to retain them or re-apply
> them as appropriate. Otherwise I will assume a fresh review is preferred.

If the removed compatible is the one for eth1, then
Acked-by: Conor Dooley <conor.dooley at microchip.com>

Cheers,
Conor.

> 
> Please let me know your preference.
> 
> Thanks,
> Zhi
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