[PATCH] iommu/arm-smmu-v3-sva: Enable Hardware Access and Hardware Dirty bits
Jason Gunthorpe
jgg at nvidia.com
Fri May 8 05:35:50 PDT 2026
On Thu, May 07, 2026 at 10:30:14PM +0000, Pranjal Shrivastava wrote:
> > @@ -92,6 +92,16 @@ void arm_smmu_make_sva_cd(struct arm_smmu_cd *target,
> >
> > target->data[1] = cpu_to_le64(virt_to_phys(mm->pgd) &
> > CTXDESC_CD_1_TTB0_MASK);
> > +
> > + /*
> > + * Enable Hardware Access and Dirty updates (DBM) if supported.
> > + * This is safe to enable by default, as PTE_WRITE and PTE_DBM
> > + * share the same bit.
> > + */
> > + if (master->smmu->features & ARM_SMMU_FEAT_HA)
> > + target->data[0] |= cpu_to_le64(CTXDESC_CD_0_TCR_HA);
> > + if (master->smmu->features & ARM_SMMU_FEAT_HD)
> > + target->data[0] |= cpu_to_le64(CTXDESC_CD_0_TCR_HD);
>
> IIUC, we should be setting these if IO_PGTABLE_QUIRK_ARM_HD is present?
SVA does not use IO_PGTABLE at all, and it directly constructs its own
CD.
No relation between those two flows.
Jason
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