[PATCH 0/7] soc: aspeed: Add AST2600 eSPI controller support
Shulzhenko, Oleksandr
oleksandr.shulzhenko at linux.intel.com
Thu May 7 09:00:45 PDT 2026
On 4/7/2026 11:36 AM, YH Chung wrote:
> Hi Arnd,
>
> Thanks for the comments and questions.
>
>> These all seem to be viable options, but I still think we should focus on
>> agreeing on a design for the low-level hardware interface and whether this
>> can or should be abstracted between SoC vendor specific drivers before
>> trying to solve the user interface side.
>
> Could you share your thoughts on whether it would make sense to accept our
> eSPI driver as is, and whether it should live under the SoC vendor-specific
> directories? Any comment would be greatly appreciated.
>
> Thanks,
> YunHsuan
Hi YunHsuan,
Let me add my 5 cents on this matter.
Integrating this driver into the SPI subsystem may allow reusing some
existing definitions, e.g.|spi_controller|,|spi_message|, and perhaps
parts related to single/dual/quad I/O handling. At the same time, parts
such as the Flash channel (included in the current series), and OOB /
Virtual Wire support (I would expect to come later), appear to be
specific to the Intel eSPI protocol. Modeling all of that as just
another SPI IP driver may introduce some awkward layering and overhead.
Also, the current series already seems to separate common eSPI logic
from AST2600-specific pieces, assuming that 2700 driver is also coming
at some point.
This makes me wonder whether a dedicated eSPI layer/subsystem could be a
better fit — either under the SPI or as something separate (but not SoC
driver).
Given my limited experience with SPI/eSPI, could you help clarify a few
points for me (and probably others as well)?
* How much of the SPI subsystem can be reused for this implementation,
both for the current patchset and for likely future extensions?
* Are there any pitfalls or abstraction mismatches in trying to reuse
the SPI core here?
I think this would help make the subsystem placement discussion much
clearer.
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