[PATCH v11 00/27] CoreSight: Refactor power management for CoreSight path
Jie Gan
jie.gan at oss.qualcomm.com
Wed May 6 00:33:38 PDT 2026
On 5/2/2026 12:47 AM, Leo Yan wrote:
> This series focuses on CoreSight path power management. The changes can
> be divided into four parts for review:
>
> Patches 01 - 09: Preparison for CPU PM:
> Fix helper enable failure handling.
> Refactor CPU ID stored in csdev.
> Move CPU lock to sysfs layer.
> Move per-CPU source pointer from etm-perf to core layer.
> Refactor etm-perf to retrieve source via per-CPU's event
> data for lockless and get source reference during AUX
> setup.
> Patches 10 - 12: Refactor CPU idle flow managed in the CoreSight core
> layer.
> Patches 13 - 22: Refactor path enable / disable with range, control path
> during CPU idle.
> Patches 23 - 24: Support the sink (TRBE) control during CPU idle.
> Patches 25 - 27: Move CPU hotplug into the core layer, and fix sysfs
> mode for hotplug.
>
> This series is rebased on the coresight-next branch and has been verified
> on Juno-r2 (ETM + ETR) and FVP RevC (ETE + TRBE). Built successfully
> for armv7 (ARCH=arm).
>
Tested on QCOM sa8775p-ride platform with sysfs mode:
=== 1. Prerequisites ===
PASS: Running as root
PASS: CoreSight bus present
PASS: Sink: tmc_etr0
Sink is TRBE: 0
PASS: Source: etm0
Source CPU: 0
Online CPUs: 8
All CoreSight devices:
ctcu0
cti_sys0
etm0
etm1
etm2
etm3
etm4
etm5
etm6
etm7
funnel0
funnel1
funnel2
funnel3
funnel4
funnel5
funnel6
funnel7
replicator0
replicator1
replicator2
stm0
tmc_etf0
tmc_etr0
tmc_etr1
tpdm0
tpdm1
tpdm10
tpdm11
tpdm2
tpdm3
tpdm4
tpdm5
tpdm6
tpdm7
tpdm8
tpdm9
=== 2. Sysfs mode: basic enable/disable ===
PASS: Sink tmc_etr0 enabled
PASS: Source etm0 enabled
PASS: Source etm0 disabled cleanly
PASS: Sink tmc_etr0 disabled cleanly
=== 3. Sysfs mode: repeated enable/disable cycles (10x) ===
PASS: 10 enable/disable cycles completed without error
=== 4. Sysfs: enable source with no active sink ===
PASS: Enable without sink returned error (expected)
=== 5. Sysfs: enable/disable all online per-CPU sources ===
etm0 (cpu0): enabled OK
etm1 (cpu1): enabled OK
etm2 (cpu2): enabled OK
etm3 (cpu3): enabled OK
etm4 (cpu4): enabled OK
etm5 (cpu5): enabled OK
etm6 (cpu6): enabled OK
etm7 (cpu7): enabled OK
PASS: All online per-CPU sources enabled/disabled successfully
=== 6. csdev->cpu sysfs attribute (Patch 3: CPU ID in coresight_device) ===
etm0: cpu = 0 (OK)
etm1: cpu = 1 (OK)
etm2: cpu = 2 (OK)
etm3: cpu = 3 (OK)
etm4: cpu = 4 (OK)
etm5: cpu = 5 (OK)
etm6: cpu = 6 (OK)
etm7: cpu = 7 (OK)
PASS: All 8 per-CPU sources have valid 'cpu' attribute
=== 7. CPU online validation before path build (Patch 27) ===
Offlining cpu1 (source: etm1)
[ 146.339051] psci: CPU1 killed (polled 0 ms)
PASS: P27: Enable on offline cpu1 rejected before path build
(enable_source=0)
[ 146.689573] Detected PIPT I-cache on CPU1
[ 146.689635] GICv3: CPU1: found redistributor 100 region
0:0x0000000017a80000
[ 146.689801] CPU1: Booted secondary processor 0x0000000100 [0x410fd4b2]
cpu1 back online
=== 8. CPU hotplug: core layer disables full sysfs path on CPU offline
(Patch 26) ===
Starting sysfs trace on cpu1 (source: etm1)
Offlining cpu1 while tracing active...
[ 147.498731] psci: CPU1 killed (polled 0 ms)
PASS: P26: Source auto-disabled by core coresight_dying_cpu() on CPU offline
Sink state after hotplug: 1
PASS: No kernel errors in dmesg during hotplug
[ 148.365194] Detected PIPT I-cache on CPU1
[ 148.365249] GICv3: CPU1: found redistributor 100 region
0:0x0000000017a80000
[ 148.365393] CPU1: Booted secondary processor 0x0000000100 [0x410fd4b2]
PASS: cpu1 re-onlined
=== 9. CPU hotplug: re-enable sysfs tracing after CPU re-online ===
PASS: Tracing re-enabled on cpu1 after hotplug cycle
=== 10. CPU PM: path control during CPU idle (Patch 22) ===
Sleeping 4s to allow CPU idle entry (source: etm0, cpu: 0)...
Idle entries on cpu0 during test: 49
PASS: P22: Source still enabled after idle — path save/restore working
Thanks,
Jie
> ---
> Changes in v11:
> - Moved per-CPU source pointer from etm-perf to core (Suzuki).
> - Added grabbing/ungrabbing csdev for device reference (Suzuki).
> - Minor refine for error handling and logs in CPU PM (James).
> - Refactored etm-perf with fetching path/source from event data (Suzuki).
> - Fixed Helper error handling (sashiko).
> - Added Jie's test tag (thanks!).
> - Minor improvement for comments and commit logs.
> - Link to v10: https://lore.kernel.org/r/20260405-arm_coresight_path_power_management_improvement-v10-0-13e94754a8be@arm.com
>
> Changes in v10:
> - Removed redundant checks in ETMv4 PM callbacks (sashiko).
> - Added a new const structure etm4_cs_pm_ops (sashiko).
> - Used fine-grained spinlock on sysfs_active_config (sashiko).
> - Blocked notification after failures in save / restore to avoid lockups.
> - Changed Change CPUHP_AP_ARM_CORESIGHT_STARTING to
> CPUHP_AP_ARM_CORESIGHT_ONLINE so that the CPU hotplug callback runs in
> the thread context (sashiko).
> - Link to v9: https://lore.kernel.org/r/20260401-arm_coresight_path_power_management_improvement-v9-0-091d73e44072@arm.com
>
> Changes in v9:
> - Changed to use per-CPU path pointer with lockless access.
> - Removed the change for adding csdev->path, the related refactoring
> will be sent separately.
> - Re-orged patches to avoid intermediate breakage (sashiko).
> - Link to v8: https://lore.kernel.org/r/20260325-arm_coresight_path_power_management_improvement-v8-0-7b1902e18041@arm.com
>
> Changes in v8:
> - Moved the "cpu" field in coresight_device for better pack with new
> patch 01 (Suzuki).
> - Added check if not set CPU for per_cpu_source/per_cpu_sink (Suzuki).
> - Renamed spinlock name in syscfg (Suzuki).
> - Refactored paired enable and disable path with new patches
> 10 and 12 (Suzuki).
> - Link to v7: https://lore.kernel.org/r/20260320-arm_coresight_path_power_management_improvement-v7-0-327ddd36b58b@arm.com
>
> Signed-off-by: Leo Yan <leo.yan at arm.com>
>
> ---
> Leo Yan (26):
> coresight: Handle helper enable failure properly
> coresight: Extract device init into coresight_init_device()
> coresight: Populate CPU ID into coresight_device
> coresight: Remove .cpu_id() callback from source ops
> coresight: Take hotplug lock in enable_source_store() for Sysfs mode
> coresight: perf: Retrieve path and source from event data
> coresight: Take a reference on csdev
> coresight: Move per-CPU source pointer to core layer
> coresight: Grab per-CPU source device during AUX setup
> coresight: Register CPU PM notifier in core layer
> coresight: etm4x: Hook CPU PM callbacks
> coresight: etm4x: Remove redundant checks in PM save and restore
> coresight: syscfg: Use IRQ-safe spinlock to protect active variables
> coresight: Move source helper disabling to coresight_disable_path()
> coresight: Control path with range
> coresight: Use helpers to fetch first and last nodes
> coresight: Introduce coresight_enable_source() helper
> coresight: Save active path for system tracers
> coresight: etm4x: Set active path on target CPU
> coresight: etm3x: Set active path on target CPU
> coresight: sysfs: Use source's path pointer for path control
> coresight: Control path during CPU idle
> coresight: Add PM callbacks for sink device
> coresight: sysfs: Increment refcount only for system tracers
> coresight: Move CPU hotplug callbacks to core layer
> coresight: sysfs: Validate CPU online status for per-CPU sources
>
> Yabin Cui (1):
> coresight: trbe: Save and restore state across CPU low power state
>
> drivers/hwtracing/coresight/coresight-catu.c | 2 +-
> drivers/hwtracing/coresight/coresight-core.c | 530 ++++++++++++++++++---
> drivers/hwtracing/coresight/coresight-cti-core.c | 9 +-
> drivers/hwtracing/coresight/coresight-etm-perf.c | 268 ++++++-----
> drivers/hwtracing/coresight/coresight-etm3x-core.c | 73 +--
> drivers/hwtracing/coresight/coresight-etm4x-core.c | 166 ++-----
> drivers/hwtracing/coresight/coresight-priv.h | 6 +
> drivers/hwtracing/coresight/coresight-syscfg.c | 38 +-
> drivers/hwtracing/coresight/coresight-syscfg.h | 2 +
> drivers/hwtracing/coresight/coresight-sysfs.c | 133 ++----
> drivers/hwtracing/coresight/coresight-trbe.c | 61 ++-
> include/linux/coresight.h | 15 +-
> include/linux/cpuhotplug.h | 2 +-
> 13 files changed, 833 insertions(+), 472 deletions(-)
> ---
> base-commit: 971f3474f8898ae8bbab19a9b547819a5e6fbcf1
> change-id: 20251104-arm_coresight_path_power_management_improvement-dab4966f8280
>
> Best regards,
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