[PATCH v3 2/3] PCI: Allow ATS to be always on for pre-CXL devices

[Tian, Kevin]

> From: Nicolin Chen <nicolinc at nvidia.com>
> Sent: Saturday, March 7, 2026 7:41 AM
> 
> Some NVIDIA GPU/NIC devices, although don't implement the CXL config
> space,
> they have many CXL-like properties. Call this kind "pre-CXL".
> 
> Similar to CXL.cache capaiblity, these pre-CXL devices also require the ATS

s/capaiblity/capability/

> function even when their RIDs are IOMMU bypassed, i.e. keep ATS "always
> on"
> v.s. "on demand" when a non-zero PASID line gets enabled in SVA use cases.
> 
> Introduce pci_dev_specific_ats_always_on() quirk function to scan a list of
> IDs for these device. Then, include it pci_ats_always_on().

"include it *in* pci_ats_always_on()"

> +
> +/* Some pre-CXL devices require ATS on the RID when it is IOMMU-
> bypassed */
> +bool pci_dev_specific_ats_always_on(struct pci_dev *pdev)

clearer to remove "on the RID ...". 

"always on" implies no condition required. and adding IOMMU bypass
info there is confusing.

Reviewed-by: Kevin Tian <kevin.tian at intel.com>