[PATCH v5 09/10] clk: realtek: Add RTD1625-CRT clock controller driver

kernel test robot lkp at intel.com
Tue Mar 24 16:06:56 PDT 2026 

Hi Yu-Chun,

kernel test robot noticed the following build errors:

[auto build test ERROR on clk/clk-next]
[also build test ERROR on robh/for-next linus/master v7.0-rc5 next-20260324]
[cannot apply to pza/reset/next pza/imx-drm/next]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url:    https://github.com/intel-lab-lkp/linux/commits/Yu-Chun-Lin/dt-bindings-clock-Add-Realtek-RTD1625-Clock-Reset-Controller/20260324-171912
base:   https://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git clk-next
patch link:    https://lore.kernel.org/r/20260324025332.3416977-10-eleanor.lin%40realtek.com
patch subject: [PATCH v5 09/10] clk: realtek: Add RTD1625-CRT clock controller driver
config: nios2-randconfig-001-20260325 (https://download.01.org/0day-ci/archive/20260325/202603250636.b3J5aCGL-lkp@intel.com/config)
compiler: nios2-linux-gcc (GCC) 8.5.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20260325/202603250636.b3J5aCGL-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp at intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202603250636.b3J5aCGL-lkp@intel.com/

All errors (new ones prefixed by >>):

   nios2-linux-ld: drivers/clk/realtek/common.o: in function `rtk_clk_probe':
>> drivers/clk/realtek/common.c:54: undefined reference to `rtk_reset_controller_add'
>> drivers/clk/realtek/common.c:54:(.text+0x134): relocation truncated to fit: R_NIOS2_CALL26 against `rtk_reset_controller_add'

Kconfig warnings: (for reference only)
   WARNING: unmet direct dependencies detected for RTK_CLK_COMMON
   Depends on [n]: COMMON_CLK [=y] && COMMON_CLK_REALTEK [=y] && RESET_CONTROLLER [=n]
   Selected by [y]:
   - COMMON_CLK_RTD1625 [=y] && COMMON_CLK [=y] && COMMON_CLK_REALTEK [=y]


vim +54 drivers/clk/realtek/common.c

105a817ead5cd3 Cheng-Yu Lee 2026-03-24  12  
105a817ead5cd3 Cheng-Yu Lee 2026-03-24  13  int rtk_clk_probe(struct platform_device *pdev, const struct rtk_clk_desc *desc)
105a817ead5cd3 Cheng-Yu Lee 2026-03-24  14  {
105a817ead5cd3 Cheng-Yu Lee 2026-03-24  15  	int i, ret;
105a817ead5cd3 Cheng-Yu Lee 2026-03-24  16  	struct regmap *regmap;
105a817ead5cd3 Cheng-Yu Lee 2026-03-24  17  	struct device *dev = &pdev->dev;
105a817ead5cd3 Cheng-Yu Lee 2026-03-24  18  	struct rtk_reset_initdata reset_initdata = {0};
105a817ead5cd3 Cheng-Yu Lee 2026-03-24  19  
105a817ead5cd3 Cheng-Yu Lee 2026-03-24  20  	regmap = device_node_to_regmap(pdev->dev.of_node);
105a817ead5cd3 Cheng-Yu Lee 2026-03-24  21  	if (IS_ERR(regmap))
105a817ead5cd3 Cheng-Yu Lee 2026-03-24  22  		return dev_err_probe(dev, PTR_ERR(regmap), "failed to get regmap\n");
105a817ead5cd3 Cheng-Yu Lee 2026-03-24  23  
105a817ead5cd3 Cheng-Yu Lee 2026-03-24  24  	for (i = 0; i < desc->num_clks; i++)
105a817ead5cd3 Cheng-Yu Lee 2026-03-24  25  		desc->clks[i]->regmap = regmap;
105a817ead5cd3 Cheng-Yu Lee 2026-03-24  26  
105a817ead5cd3 Cheng-Yu Lee 2026-03-24  27  	for (i = 0; i < desc->clk_data->num; i++) {
105a817ead5cd3 Cheng-Yu Lee 2026-03-24  28  		struct clk_hw *hw = desc->clk_data->hws[i];
105a817ead5cd3 Cheng-Yu Lee 2026-03-24  29  
105a817ead5cd3 Cheng-Yu Lee 2026-03-24  30  		if (!hw)
105a817ead5cd3 Cheng-Yu Lee 2026-03-24  31  			continue;
105a817ead5cd3 Cheng-Yu Lee 2026-03-24  32  
105a817ead5cd3 Cheng-Yu Lee 2026-03-24  33  		ret = devm_clk_hw_register(dev, hw);
105a817ead5cd3 Cheng-Yu Lee 2026-03-24  34  
105a817ead5cd3 Cheng-Yu Lee 2026-03-24  35  		if (ret) {
105a817ead5cd3 Cheng-Yu Lee 2026-03-24  36  			dev_warn(dev, "failed to register hw of clk%d: %d\n", i,
105a817ead5cd3 Cheng-Yu Lee 2026-03-24  37  				 ret);
105a817ead5cd3 Cheng-Yu Lee 2026-03-24  38  			desc->clk_data->hws[i] = NULL;
105a817ead5cd3 Cheng-Yu Lee 2026-03-24  39  		}
105a817ead5cd3 Cheng-Yu Lee 2026-03-24  40  	}
105a817ead5cd3 Cheng-Yu Lee 2026-03-24  41  
105a817ead5cd3 Cheng-Yu Lee 2026-03-24  42  	ret = devm_of_clk_add_hw_provider(dev, of_clk_hw_onecell_get,
105a817ead5cd3 Cheng-Yu Lee 2026-03-24  43  					  desc->clk_data);
105a817ead5cd3 Cheng-Yu Lee 2026-03-24  44  	if (ret)
105a817ead5cd3 Cheng-Yu Lee 2026-03-24  45  		return dev_err_probe(dev, ret, "failed to add clock provider\n");
105a817ead5cd3 Cheng-Yu Lee 2026-03-24  46  
105a817ead5cd3 Cheng-Yu Lee 2026-03-24  47  	if (!desc->num_reset_descs)
105a817ead5cd3 Cheng-Yu Lee 2026-03-24  48  		return 0;
105a817ead5cd3 Cheng-Yu Lee 2026-03-24  49  
105a817ead5cd3 Cheng-Yu Lee 2026-03-24  50  	reset_initdata.regmap = regmap;
105a817ead5cd3 Cheng-Yu Lee 2026-03-24  51  	reset_initdata.num_descs = desc->num_reset_descs;
105a817ead5cd3 Cheng-Yu Lee 2026-03-24  52  	reset_initdata.descs = desc->reset_descs;
105a817ead5cd3 Cheng-Yu Lee 2026-03-24  53  
105a817ead5cd3 Cheng-Yu Lee 2026-03-24 @54  	return rtk_reset_controller_add(dev, &reset_initdata);
105a817ead5cd3 Cheng-Yu Lee 2026-03-24  55  }
105a817ead5cd3 Cheng-Yu Lee 2026-03-24  56  EXPORT_SYMBOL_GPL(rtk_clk_probe);
105a817ead5cd3 Cheng-Yu Lee 2026-03-24  57  

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