[PATCH v3 0/6] can: flexcan: Add NXP S32N79 SoC support
Ciprian Marian Costea
ciprianmarian.costea at oss.nxp.com
Tue Mar 24 05:18:02 PDT 2026
On 3/24/2026 1:58 PM, Marc Kleine-Budde wrote:
> On 23.03.2026 14:58:21, Ciprian Costea wrote:
>> From: Ciprian Marian Costea <ciprianmarian.costea at oss.nxp.com>
>>
>> This patch series adds FlexCAN support for the NXP S32N79 SoC.
>>
>> The S32N79 is an automotive-grade processor from NXP with multiple
>> FlexCAN instances. The FlexCAN IP integration on S32N79 differs from
>> other SoCs in the interrupt routing - it uses two separate interrupt
>> lines:
>> - one interrupt for mailboxes 0-127
>> - one interrupt for bus error detection and device state changes
>>
>> The CAN controllers are connected through an irqsteer interrupt
>> controller in the RCU (Resource Control Unit) domain.
>>
>> This series:
>> 1. Splits flexcan_irq() into dedicated handlers for multi-IRQ platforms
>> 2. Adds dt-bindings documentation for S32N79 FlexCAN
>> 3. Introduces FLEXCAN_QUIRK_IRQ_BERR to handle the two-interrupt
>> configuration
>> 4. Adds S32N79 device data and compatible string to the driver
>> 5. Adds FlexCAN device tree nodes for S32N79 SoC
>> 6. Enables FlexCAN devices on the S32N79-RDB board
>
> Can you please add support for multiple IRQs to
> flexcan_chip_interrupts_enable().
>
> regards,
> Marc
>
Hello Marc,
Yes. Thanks for pointing this out. I will update
flexcan_chip_interrupts_enable() in V4.
Regards,
Ciprian
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