[PATCH 5/5] KVM: arm64: Remove extra ISBs when using msr_hcr_el2

[Fuad Tabba]

On Sat, 21 Mar 2026 at 21:24, Marc Zyngier <maz at kernel.org> wrote:
>
> The msr_hcr_el2 macro is slightly awkward, as it provides an ISB
> when CONFIG_AMPERE_ERRATUM_AC04_CPU_23 is present, and none
> otherwise. Note that this this option is 'default y', meaning that
> it is likely to be selected.
>
> Most instances of msr_hcr_el2 are also immediately followed by an ISB,
> meaning that in most cases, you end-up with two back-to-back ISBs.
> This isn't a big deal, but once you have seen that, you can't unsee it.
>
> Rework the msr_hcr_el2 macro to always provide the ISB, and drop
> the superfluous ISBs everywhere else.
>
> Signed-off-by: Marc Zyngier <maz at kernel.org>

Reviewed-by: Fuad Tabba <tabba at google.com>

Cheers,
/fuad

> ---
>  arch/arm64/include/asm/el2_setup.h | 2 --
>  arch/arm64/include/asm/sysreg.h    | 6 ++----
>  arch/arm64/kernel/hyp-stub.S       | 1 -
>  arch/arm64/kvm/hyp/nvhe/host.S     | 1 -
>  4 files changed, 2 insertions(+), 8 deletions(-)
>
> diff --git a/arch/arm64/include/asm/el2_setup.h b/arch/arm64/include/asm/el2_setup.h
> index 85f4c1615472d..3e58d6264581e 100644
> --- a/arch/arm64/include/asm/el2_setup.h
> +++ b/arch/arm64/include/asm/el2_setup.h
> @@ -50,7 +50,6 @@
>          * effectively VHE-only or not.
>          */
>         msr_hcr_el2 x0          // Setup HCR_EL2 as nVHE
> -       isb
>         mov     x1, #1          // Write something to FAR_EL1
>         msr     far_el1, x1
>         isb
> @@ -64,7 +63,6 @@
>  .LnE2H0_\@:
>         orr     x0, x0, #HCR_E2H
>         msr_hcr_el2 x0
> -       isb
>  .LnVHE_\@:
>  .endm
>
> diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
> index f4436ecc630cd..ca66b8017fa87 100644
> --- a/arch/arm64/include/asm/sysreg.h
> +++ b/arch/arm64/include/asm/sysreg.h
> @@ -1114,11 +1114,9 @@
>         .macro  msr_hcr_el2, reg
>  #if IS_ENABLED(CONFIG_AMPERE_ERRATUM_AC04_CPU_23)
>         dsb     nsh
> -       msr     hcr_el2, \reg
> -       isb
> -#else
> -       msr     hcr_el2, \reg
>  #endif
> +       msr     hcr_el2, \reg
> +       isb                     // Required by AMPERE_ERRATUM_AC04_CPU_23
>         .endm
>  #else
>
> diff --git a/arch/arm64/kernel/hyp-stub.S b/arch/arm64/kernel/hyp-stub.S
> index 085bc9972f6bb..634ddc9042444 100644
> --- a/arch/arm64/kernel/hyp-stub.S
> +++ b/arch/arm64/kernel/hyp-stub.S
> @@ -103,7 +103,6 @@ SYM_CODE_START_LOCAL(__finalise_el2)
>         // Engage the VHE magic!
>         mov_q   x0, HCR_HOST_VHE_FLAGS
>         msr_hcr_el2 x0
> -       isb
>
>         // Use the EL1 allocated stack, per-cpu offset
>         mrs     x0, sp_el1
> diff --git a/arch/arm64/kvm/hyp/nvhe/host.S b/arch/arm64/kvm/hyp/nvhe/host.S
> index 465f6f1dd6414..ff10cafa0ca81 100644
> --- a/arch/arm64/kvm/hyp/nvhe/host.S
> +++ b/arch/arm64/kvm/hyp/nvhe/host.S
> @@ -125,7 +125,6 @@ SYM_FUNC_START(__hyp_do_panic)
>         mrs     x0, hcr_el2
>         bic     x0, x0, #HCR_VM
>         msr_hcr_el2 x0
> -       isb
>         tlbi    vmalls12e1
>         dsb     nsh
>  #endif
> --
> 2.47.3
>