[PATCH v3 10/10] RAS: add firmware-first CPER provider
kernel test robot
lkp at intel.com
Thu Mar 19 12:36:11 PDT 2026
Hi Ahmed,
kernel test robot noticed the following build errors:
[auto build test ERROR on 2d1373e4246da3b58e1df058374ed6b101804e07]
url: https://github.com/intel-lab-lkp/linux/commits/Ahmed-Tiba/ACPI-APEI-GHES-share-macros-via-a-private-header/20260319-115432
base: 2d1373e4246da3b58e1df058374ed6b101804e07
patch link: https://lore.kernel.org/r/20260318-topics-ahmtib01-ras_ffh_arm_internal_review-v3-10-48e6a1c249ef%40arm.com
patch subject: [PATCH v3 10/10] RAS: add firmware-first CPER provider
config: hexagon-randconfig-001-20260320 (https://download.01.org/0day-ci/archive/20260320/202603200349.vMgMwlEs-lkp@intel.com/config)
compiler: clang version 23.0.0git (https://github.com/llvm/llvm-project 4abb927bacf37f18f6359a41639a6d1b3bffffb5)
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20260320/202603200349.vMgMwlEs-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp at intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202603200349.vMgMwlEs-lkp@intel.com/
All errors (new ones prefixed by >>):
>> drivers/ras/cper-esource.c:84:9: error: call to undeclared function 'readq'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration]
84 | val = readq(ctx->ack.addr);
| ^
>> drivers/ras/cper-esource.c:87:3: error: call to undeclared function 'writeq'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration]
87 | writeq(val, ctx->ack.addr);
| ^
2 errors generated.
vim +/readq +84 drivers/ras/cper-esource.c
75
76 static void cper_esource_ack(struct cper_esource *ctx)
77 {
78 u64 val;
79
80 if (!ctx->ack.present)
81 return;
82
83 if (ctx->ack.width == 64) {
> 84 val = readq(ctx->ack.addr);
85 val &= ctx->ack.preserve;
86 val |= ctx->ack.set;
> 87 writeq(val, ctx->ack.addr);
88 } else {
89 val = readl(ctx->ack.addr);
90 val &= (u32)ctx->ack.preserve;
91 val |= (u32)ctx->ack.set;
92 writel(val, ctx->ack.addr);
93 }
94 }
95
--
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