[PATCH] arm64: dts: renesas: rzt2h-rzn2h-evk: Fix GMAC pins sort order
Lad, Prabhakar
prabhakar.csengg at gmail.com
Thu Mar 19 05:16:47 PDT 2026
On Wed, Mar 18, 2026 at 2:16 PM Geert Uytterhoeven
<geert+renesas at glider.be> wrote:
>
> Restore alphabetical sort order of the pin control subnodes by
> exchanging the gmac1-pins and gmac2-pins nodes.
> While at it, fix the index in an incorrect "GMAC2" comment.
>
> Signed-off-by: Geert Uytterhoeven <geert+renesas at glider.be>
> ---
> To be queued in renesas-devel for v7.1.
>
> .../dts/renesas/r9a09g077m44-rzt2h-evk.dts | 58 +++++++++---------
> .../dts/renesas/r9a09g087m44-rzn2h-evk.dts | 60 +++++++++----------
> 2 files changed, 59 insertions(+), 59 deletions(-)
>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj at bp.renesas.com>
Cheers,
Prabhakar
> diff --git a/arch/arm64/boot/dts/renesas/r9a09g077m44-rzt2h-evk.dts b/arch/arm64/boot/dts/renesas/r9a09g077m44-rzt2h-evk.dts
> index 52e5f6c3ab67d177..4c0e52850ca97250 100644
> --- a/arch/arm64/boot/dts/renesas/r9a09g077m44-rzt2h-evk.dts
> +++ b/arch/arm64/boot/dts/renesas/r9a09g077m44-rzt2h-evk.dts
> @@ -253,6 +253,35 @@ can0_pins: can0-pins {
> <RZT2H_PORT_PINMUX(24, 4, 0x19)>; /* CANTX0 */
> };
>
> + /*
> + * GMAC1 Pin Configuration:
> + *
> + * SW2[8] ON - use pins P33_2-P33_7, P34_0-P34_5, P34_7 and
> + * P35_0-P35_2 for Ethernet port 3
> + */
> + gmac1_pins: gmac1-pins {
> + pinmux = <RZT2H_PORT_PINMUX(33, 2, 0xf)>, /* ETH3_TXCLK */
> + <RZT2H_PORT_PINMUX(33, 3, 0xf)>, /* ETH3_TXD0 */
> + <RZT2H_PORT_PINMUX(33, 4, 0xf)>, /* ETH3_TXD1 */
> + <RZT2H_PORT_PINMUX(33, 5, 0xf)>, /* ETH3_TXD2 */
> + <RZT2H_PORT_PINMUX(33, 6, 0xf)>, /* ETH3_TXD3 */
> + <RZT2H_PORT_PINMUX(33, 7, 0xf)>, /* ETH3_TXEN */
> + <RZT2H_PORT_PINMUX(34, 0, 0xf)>, /* ETH3_RXCLK */
> + <RZT2H_PORT_PINMUX(34, 1, 0xf)>, /* ETH3_RXD0 */
> + <RZT2H_PORT_PINMUX(34, 2, 0xf)>, /* ETH3_RXD1 */
> + <RZT2H_PORT_PINMUX(34, 3, 0xf)>, /* ETH3_RXD2 */
> + <RZT2H_PORT_PINMUX(34, 4, 0xf)>, /* ETH3_RXD3 */
> + <RZT2H_PORT_PINMUX(34, 5, 0xf)>, /* ETH3_RXDV */
> + <RZT2H_PORT_PINMUX(34, 7, 0xf)>, /* ETH3_TXER */
> + <RZT2H_PORT_PINMUX(35, 0, 0xf)>, /* ETH3_RXER */
> + <RZT2H_PORT_PINMUX(35, 1, 0xf)>, /* ETH3_CRS */
> + <RZT2H_PORT_PINMUX(35, 2, 0xf)>, /* ETH3_COL */
> + <RZT2H_PORT_PINMUX(26, 1, 0x10)>, /* GMAC1_MDC */
> + <RZT2H_PORT_PINMUX(26, 2, 0x10)>, /* GMAC1_MDIO */
> + <RZT2H_PORT_PINMUX(34, 6, 0x2)>, /* ETH3_REFCLK */
> + <RZT2H_PORT_PINMUX(27, 2, 0x0)>; /* IRQ3 */
> + };
> +
> /*
> * GMAC2 Pin Configuration:
> *
> @@ -283,35 +312,6 @@ gmac2_pins: gmac2-pins {
> <RZT2H_PORT_PINMUX(31, 1, 0x0)>; /* IRQ13 */
> };
>
> - /*
> - * GMAC1 Pin Configuration:
> - *
> - * SW2[8] ON - use pins P33_2-P33_7, P34_0-P34_5, P34_7 and
> - * P35_0-P35_2 for Ethernet port 3
> - */
> - gmac1_pins: gmac1-pins {
> - pinmux = <RZT2H_PORT_PINMUX(33, 2, 0xf)>, /* ETH3_TXCLK */
> - <RZT2H_PORT_PINMUX(33, 3, 0xf)>, /* ETH3_TXD0 */
> - <RZT2H_PORT_PINMUX(33, 4, 0xf)>, /* ETH3_TXD1 */
> - <RZT2H_PORT_PINMUX(33, 5, 0xf)>, /* ETH3_TXD2 */
> - <RZT2H_PORT_PINMUX(33, 6, 0xf)>, /* ETH3_TXD3 */
> - <RZT2H_PORT_PINMUX(33, 7, 0xf)>, /* ETH3_TXEN */
> - <RZT2H_PORT_PINMUX(34, 0, 0xf)>, /* ETH3_RXCLK */
> - <RZT2H_PORT_PINMUX(34, 1, 0xf)>, /* ETH3_RXD0 */
> - <RZT2H_PORT_PINMUX(34, 2, 0xf)>, /* ETH3_RXD1 */
> - <RZT2H_PORT_PINMUX(34, 3, 0xf)>, /* ETH3_RXD2 */
> - <RZT2H_PORT_PINMUX(34, 4, 0xf)>, /* ETH3_RXD3 */
> - <RZT2H_PORT_PINMUX(34, 5, 0xf)>, /* ETH3_RXDV */
> - <RZT2H_PORT_PINMUX(34, 7, 0xf)>, /* ETH3_TXER */
> - <RZT2H_PORT_PINMUX(35, 0, 0xf)>, /* ETH3_RXER */
> - <RZT2H_PORT_PINMUX(35, 1, 0xf)>, /* ETH3_CRS */
> - <RZT2H_PORT_PINMUX(35, 2, 0xf)>, /* ETH3_COL */
> - <RZT2H_PORT_PINMUX(26, 1, 0x10)>, /* GMAC1_MDC */
> - <RZT2H_PORT_PINMUX(26, 2, 0x10)>, /* GMAC1_MDIO */
> - <RZT2H_PORT_PINMUX(34, 6, 0x2)>, /* ETH3_REFCLK */
> - <RZT2H_PORT_PINMUX(27, 2, 0x0)>; /* IRQ3 */
> - };
> -
> /*
> * I2C0 Pin Configuration:
> * ------------------------
> diff --git a/arch/arm64/boot/dts/renesas/r9a09g087m44-rzn2h-evk.dts b/arch/arm64/boot/dts/renesas/r9a09g087m44-rzn2h-evk.dts
> index 3c636c92f3d6f445..ef6cc7497c2c4c8c 100644
> --- a/arch/arm64/boot/dts/renesas/r9a09g087m44-rzn2h-evk.dts
> +++ b/arch/arm64/boot/dts/renesas/r9a09g087m44-rzn2h-evk.dts
> @@ -336,6 +336,36 @@ can1_pins: can1-pins {
> <RZT2H_PORT_PINMUX(12, 1, 0x19)>; /* CANTX1 */
> };
>
> + /*
> + * GMAC1 Pin Configuration:
> + *
> + * DSW5[8] ON - use pins P00_0-P00_2, P33_2-P33_7, P34_0-P34_6
> + * for Ethernet port 3
> + * DSW12[1] OFF; DSW12[2] ON - use pin P00_3 for Ethernet port 3
> + */
> + gmac1_pins: gmac1-pins {
> + pinmux = <RZT2H_PORT_PINMUX(33, 2, 0xf)>, /* ETH3_TXCLK */
> + <RZT2H_PORT_PINMUX(33, 3, 0xf)>, /* ETH3_TXD0 */
> + <RZT2H_PORT_PINMUX(33, 4, 0xf)>, /* ETH3_TXD0 */
> + <RZT2H_PORT_PINMUX(33, 5, 0xf)>, /* ETH3_TXD2 */
> + <RZT2H_PORT_PINMUX(33, 6, 0xf)>, /* ETH3_TXD3 */
> + <RZT2H_PORT_PINMUX(33, 7, 0xf)>, /* ETH3_TXEN */
> + <RZT2H_PORT_PINMUX(34, 0, 0xf)>, /* ETH3_RXCLK */
> + <RZT2H_PORT_PINMUX(34, 1, 0xf)>, /* ETH3_RXD0 */
> + <RZT2H_PORT_PINMUX(34, 2, 0xf)>, /* ETH3_RXD1 */
> + <RZT2H_PORT_PINMUX(34, 3, 0xf)>, /* ETH3_RXD2 */
> + <RZT2H_PORT_PINMUX(34, 4, 0xf)>, /* ETH3_RXD3 */
> + <RZT2H_PORT_PINMUX(34, 5, 0xf)>, /* ETH3_RXDV */
> + <RZT2H_PORT_PINMUX(0, 0, 0xf)>, /* ETH3_TXER */
> + <RZT2H_PORT_PINMUX(0, 1, 0xf)>, /* ETH3_RXER */
> + <RZT2H_PORT_PINMUX(0, 2, 0xf)>, /* ETH3_CRS */
> + <RZT2H_PORT_PINMUX(0, 3, 0xf)>, /* ETH3_COL */
> + <RZT2H_PORT_PINMUX(26, 1, 0x10)>, /* GMAC1_MDC */
> + <RZT2H_PORT_PINMUX(26, 2, 0x10)>, /* GMAC1_MDIO */
> + <RZT2H_PORT_PINMUX(34, 6, 0x2)>, /* ETH3_REFCLK */
> + <RZT2H_PORT_PINMUX(17, 3, 0x0)>; /* IRQ15 */
> + };
> +
> /*
> * GMAC2 Pin Configuration:
> *
> @@ -368,36 +398,6 @@ gmac2_pins: gmac2-pins {
>
> };
>
> - /*
> - * GMAC2 Pin Configuration:
> - *
> - * DSW5[8] ON - use pins P00_0-P00_2, P33_2-P33_7, P34_0-P34_6
> - * for Ethernet port 3
> - * DSW12[1] OFF; DSW12[2] ON - use pin P00_3 for Ethernet port 3
> - */
> - gmac1_pins: gmac1-pins {
> - pinmux = <RZT2H_PORT_PINMUX(33, 2, 0xf)>, /* ETH3_TXCLK */
> - <RZT2H_PORT_PINMUX(33, 3, 0xf)>, /* ETH3_TXD0 */
> - <RZT2H_PORT_PINMUX(33, 4, 0xf)>, /* ETH3_TXD0 */
> - <RZT2H_PORT_PINMUX(33, 5, 0xf)>, /* ETH3_TXD2 */
> - <RZT2H_PORT_PINMUX(33, 6, 0xf)>, /* ETH3_TXD3 */
> - <RZT2H_PORT_PINMUX(33, 7, 0xf)>, /* ETH3_TXEN */
> - <RZT2H_PORT_PINMUX(34, 0, 0xf)>, /* ETH3_RXCLK */
> - <RZT2H_PORT_PINMUX(34, 1, 0xf)>, /* ETH3_RXD0 */
> - <RZT2H_PORT_PINMUX(34, 2, 0xf)>, /* ETH3_RXD1 */
> - <RZT2H_PORT_PINMUX(34, 3, 0xf)>, /* ETH3_RXD2 */
> - <RZT2H_PORT_PINMUX(34, 4, 0xf)>, /* ETH3_RXD3 */
> - <RZT2H_PORT_PINMUX(34, 5, 0xf)>, /* ETH3_RXDV */
> - <RZT2H_PORT_PINMUX(0, 0, 0xf)>, /* ETH3_TXER */
> - <RZT2H_PORT_PINMUX(0, 1, 0xf)>, /* ETH3_RXER */
> - <RZT2H_PORT_PINMUX(0, 2, 0xf)>, /* ETH3_CRS */
> - <RZT2H_PORT_PINMUX(0, 3, 0xf)>, /* ETH3_COL */
> - <RZT2H_PORT_PINMUX(26, 1, 0x10)>, /* GMAC1_MDC */
> - <RZT2H_PORT_PINMUX(26, 2, 0x10)>, /* GMAC1_MDIO */
> - <RZT2H_PORT_PINMUX(34, 6, 0x2)>, /* ETH3_REFCLK */
> - <RZT2H_PORT_PINMUX(17, 3, 0x0)>; /* IRQ15 */
> - };
> -
> /*
> * I2C0 Pin Configuration:
> * ------------------------
> --
> 2.43.0
>
>
More information about the linux-arm-kernel
mailing list