[PATCH v10 07/30] KVM: arm64: Move SVE state access macros after feature test macros

Jean-Philippe Brucker jpb at kernel.org
Wed Mar 18 10:32:26 PDT 2026


On Fri, Mar 06, 2026 at 05:00:59PM +0000, Mark Brown wrote:
> In preparation for SME support move the macros used to access SVE state
> after the feature test macros, we will need to test for SME subfeatures to
> determine the size of the SME state.
> 
> Reviewed-by: Fuad Tabba <tabba at google.com>
> Signed-off-by: Mark Brown <broonie at kernel.org>

Reviewed-by: Jean-Philippe Brucker <jpb at kernel.org>

> ---
>  arch/arm64/include/asm/kvm_host.h | 50 +++++++++++++++++++--------------------
>  1 file changed, 25 insertions(+), 25 deletions(-)
> 
> diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm_host.h
> index 2ca264b3db5f..3e7247b3890c 100644
> --- a/arch/arm64/include/asm/kvm_host.h
> +++ b/arch/arm64/include/asm/kvm_host.h
> @@ -1072,31 +1072,6 @@ struct kvm_vcpu_arch {
>  #define NESTED_SERROR_PENDING	__vcpu_single_flag(sflags, BIT(8))
>  
>  
> -/* Pointer to the vcpu's SVE FFR for sve_{save,load}_state() */
> -#define vcpu_sve_pffr(vcpu) (kern_hyp_va((vcpu)->arch.sve_state) +	\
> -			     sve_ffr_offset((vcpu)->arch.sve_max_vl))
> -
> -#define vcpu_sve_max_vq(vcpu)	sve_vq_from_vl((vcpu)->arch.sve_max_vl)
> -
> -#define vcpu_sve_zcr_elx(vcpu)						\
> -	(unlikely(is_hyp_ctxt(vcpu)) ? ZCR_EL2 : ZCR_EL1)
> -
> -#define sve_state_size_from_vl(sve_max_vl) ({				\
> -	size_t __size_ret;						\
> -	unsigned int __vq;						\
> -									\
> -	if (WARN_ON(!sve_vl_valid(sve_max_vl))) {			\
> -		__size_ret = 0;						\
> -	} else {							\
> -		__vq = sve_vq_from_vl(sve_max_vl);			\
> -		__size_ret = SVE_SIG_REGS_SIZE(__vq);			\
> -	}								\
> -									\
> -	__size_ret;							\
> -})
> -
> -#define vcpu_sve_state_size(vcpu) sve_state_size_from_vl((vcpu)->arch.sve_max_vl)
> -
>  #define KVM_GUESTDBG_VALID_MASK (KVM_GUESTDBG_ENABLE | \
>  				 KVM_GUESTDBG_USE_SW_BP | \
>  				 KVM_GUESTDBG_USE_HW | \
> @@ -1132,6 +1107,31 @@ struct kvm_vcpu_arch {
>  
>  #define vcpu_gp_regs(v)		(&(v)->arch.ctxt.regs)
>  
> +/* Pointer to the vcpu's SVE FFR for sve_{save,load}_state() */
> +#define vcpu_sve_pffr(vcpu) (kern_hyp_va((vcpu)->arch.sve_state) +	\
> +			     sve_ffr_offset((vcpu)->arch.sve_max_vl))
> +
> +#define vcpu_sve_max_vq(vcpu)	sve_vq_from_vl((vcpu)->arch.sve_max_vl)
> +
> +#define vcpu_sve_zcr_elx(vcpu)						\
> +	(unlikely(is_hyp_ctxt(vcpu)) ? ZCR_EL2 : ZCR_EL1)
> +
> +#define sve_state_size_from_vl(sve_max_vl) ({				\
> +	size_t __size_ret;						\
> +	unsigned int __vq;						\
> +									\
> +	if (WARN_ON(!sve_vl_valid(sve_max_vl))) {			\
> +		__size_ret = 0;						\
> +	} else {							\
> +		__vq = sve_vq_from_vl(sve_max_vl);			\
> +		__size_ret = SVE_SIG_REGS_SIZE(__vq);			\
> +	}								\
> +									\
> +	__size_ret;							\
> +})
> +
> +#define vcpu_sve_state_size(vcpu) sve_state_size_from_vl((vcpu)->arch.sve_max_vl)
> +
>  /*
>   * Only use __vcpu_sys_reg/ctxt_sys_reg if you know you want the
>   * memory backed version of a register, and not the one most recently
> 
> -- 
> 2.47.3
> 
> 



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