[PATCH v2 1/6] clk: imx: fracn-gppll: Add 333.333333 MHz support

[Abel Vesa]

On 26-03-13 08:07:31, Alexander Stein wrote:
> Some parallel panels have a pixelclk of 33.30 MHz. Add support for
> 333.333333 MHz so a by 10 divider can be used to derive the exact pixelclk.
> 
> Signed-off-by: Alexander Stein <alexander.stein at ew.tq-group.com>

Reviewed-by: Abel Vesa <abel.vesa at oss.qualcomm.com>