[PATCH v2 7/7] ARM: dts: bcm63148: Add I2C block

[William Zhang]

On Wed, Feb 18, 2026 at 1:31 AM Linus Walleij <linusw at kernel.org> wrote:
>
> The BCM63148 has a brcmper I2C block.
>
> The peripheral range needs to be extended to accommodate
> it. The Boot LUT is at offset + 0x10000 so extend it to
> cover at least that too, 128 KB.
>
> INTERRUPT_ID_I2C is at (ISR_TABLE3_OFFSET + 19) = 96+19 = 115,
> convert back to SPI IRQ 115-32 = 83.
>
> Signed-off-by: Linus Walleij <linus.walleij at linaro.org>
> ---
>  arch/arm/boot/dts/broadcom/bcm63148.dtsi | 11 ++++++++++-
>  1 file changed, 10 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm/boot/dts/broadcom/bcm63148.dtsi b/arch/arm/boot/dts/broadcom/bcm63148.dtsi
> index e071cddb28fc..52aea853095c 100644
> --- a/arch/arm/boot/dts/broadcom/bcm63148.dtsi
> +++ b/arch/arm/boot/dts/broadcom/bcm63148.dtsi
> @@ -97,7 +97,7 @@ bus at ff800000 {
>                 compatible = "simple-bus";
>                 #address-cells = <1>;
>                 #size-cells = <1>;
> -               ranges = <0 0xfffe8000 0x8000>;
> +               ranges = <0 0xfffe8000 0x20000>;
>
>                 /* GPIOs 0 .. 31 */
>                 gpio0: gpio at 100 {
> @@ -197,5 +197,14 @@ nandcs: nand at 0 {
>                                 reg = <0>;
>                         };
>                 };
> +
> +               i2c0: i2c at be00 {
> +                       compatible = "brcm,brcmper-i2c";
> +                       reg = <0xbe00 0x60>;
Same as 63138. Should be 0x3e00.

> +                       interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
> +                       #address-cells = <1>;
> +                       #size-cells = <0>;
> +                       status = "disabled";
> +               };
>         };
>  };
>
> --
> 2.53.0
>
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