[PATCH 2/2] perf: tools: cs-etm: Enhance raw Coresight trace debug display

[Leo Yan]

On Fri, Mar 13, 2026 at 01:21:29PM +0000, Coresight ML wrote:

[...]

> ETE trace output changes from:
> 
> Idx:0; ID:14; I_ASYNC : Alignment Synchronisation.
> Idx:12; ID:14; I_TRACE_INFO : Trace Info.; INFO=0x0 { CC.0, TSTATE.0 };
>                Decoder Sync point TINFO
> Idx:15; ID:14; I_ADDR_L_64IS0 : Address, Long, 64 bit, IS0.;
>                Addr=0xFFFF80007CF7F56C;
> becoming:
> 
> Idx:0; ID:14;[0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x80];
>               I_ASYNC : Alignment Synchronisation.
> Idx:12; ID:14; [0x01 0x01 0x00 ]; I_TRACE_INFO : Trace Info.; INFO=0x0
>                { CC.0, TSTATE.0 }; Decoder Sync point TINFO
> Idx:15; ID:14; [0x9d 0x5b 0x7a 0xf7 0x7c 0x00 0x80 0xff 0xff ];
>                I_ADDR_L_64IS0 : Address, Long, 64 bit, IS0.;
> 	       Addr=0xFFFF80007CF7F56C;
> 
> Signed-off-by: Mike Leach <mike.leach at arm.com>

LGTM and I tested it:

Tested-by: Leo Yan <leo.yan at arm.com>