[PATCH V8 06/13] arm: dts: imx6qdl: Add Root Port node and PERST property

[Chen-Yu Tsai]

On Fri, Mar 13, 2026 at 10:08 AM Sherry Sun <sherry.sun at nxp.com> wrote:
>
> Since describing the PCIe PERST# property under Host Bridge node is now
> deprecated, it is recommended to add it to the Root Port node, so
> creating the Root Port node and add the reset-gpios property in Root
> Port.
>
> Signed-off-by: Sherry Sun <sherry.sun at nxp.com>
> ---
>  arch/arm/boot/dts/nxp/imx/imx6qdl-sabresd.dtsi |  5 +++++
>  arch/arm/boot/dts/nxp/imx/imx6qdl.dtsi         | 11 +++++++++++
>  arch/arm/boot/dts/nxp/imx/imx6qp-sabreauto.dts |  5 +++++
>  3 files changed, 21 insertions(+)
>
> diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-sabresd.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-sabresd.dtsi
> index ba29720e3f72..fe9046c03ddd 100644
> --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-sabresd.dtsi
> +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-sabresd.dtsi
> @@ -754,11 +754,16 @@ lvds0_out: endpoint {
>  &pcie {
>         pinctrl-names = "default";
>         pinctrl-0 = <&pinctrl_pcie>;
> +       /* This property is deprecated, use reset-gpios from the Root Port node. */
>         reset-gpio = <&gpio7 12 GPIO_ACTIVE_LOW>;

I'd say just remove the old description.

You're asking for trouble by describing the same thing in two different places.

>         vpcie-supply = <&reg_pcie>;

I would probably also take this chance to just convert to the proper PCI
slot supply, and just add pwrctrl support into your PCIe driver.


>         status = "okay";
>  };
>
> +&pcie_port0 {
> +       reset-gpios = <&gpio7 12 GPIO_ACTIVE_LOW>;
> +};
> +
>  &pwm1 {
>         pinctrl-names = "default";
>         pinctrl-0 = <&pinctrl_pwm1>;
> diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl.dtsi
> index 4dc2c410cf61..9438862b9927 100644
> --- a/arch/arm/boot/dts/nxp/imx/imx6qdl.dtsi
> +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl.dtsi
> @@ -302,6 +302,17 @@ pcie: pcie at 1ffc000 {
>                                  <&clks IMX6QDL_CLK_PCIE_REF_125M>;
>                         clock-names = "pcie", "pcie_bus", "pcie_phy";
>                         status = "disabled";
> +
> +                       pcie_port0: pcie at 0 {
> +                               compatible = "pciclass,0604";
> +                               device_type = "pci";
> +                               reg = <0x0 0x0 0x0 0x0 0x0>;
> +                               bus-range = <0x01 0xff>;
> +
> +                               #address-cells = <3>;
> +                               #size-cells = <2>;
> +                               ranges;
> +                       };
>                 };
>
>                 aips1: bus at 2000000 { /* AIPS1 */
> diff --git a/arch/arm/boot/dts/nxp/imx/imx6qp-sabreauto.dts b/arch/arm/boot/dts/nxp/imx/imx6qp-sabreauto.dts
> index c5b220aeaefd..6b12cab7175f 100644
> --- a/arch/arm/boot/dts/nxp/imx/imx6qp-sabreauto.dts
> +++ b/arch/arm/boot/dts/nxp/imx/imx6qp-sabreauto.dts
> @@ -45,10 +45,15 @@ MX6QDL_PAD_GPIO_6__ENET_IRQ         0x000b1
>  };
>
>  &pcie {
> +       /* This property is deprecated, use reset-gpios from the Root Port node. */
>         reset-gpio = <&max7310_c 5 GPIO_ACTIVE_LOW>;
>         status = "okay";
>  };
>
> +&pcie_port0 {
> +       reset-gpios = <&max7310_c 5 GPIO_ACTIVE_LOW>;
> +};
> +
>  &sata {
>         status = "okay";
>  };
> --
> 2.37.1
>
>